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LaBerge; Paul A. Patent Filings

LaBerge; Paul A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for LaBerge; Paul A..The latest application filed is for "switched interface stacked-die memory architecture".

Company Profile
0.105.73
  • LaBerge; Paul A. - Shoreview MN
  • LaBerge; Paul A - Shoreview MN
  • Laberge; Paul A. - Coon Rapids MN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Switched interface stacked-die memory architecture
Grant 10,297,340 - Jeddeloh , et al.
2019-05-21
Switched Interface Stacked-die Memory Architecture
App 20180358111 - Jeddeloh; Joe M. ;   et al.
2018-12-13
Switched interface stacked-die memory architecture
Grant 10,037,818 - Jeddeloh , et al. July 31, 2
2018-07-31
Switched Interface Stacked-die Memory Architecture
App 20180114587 - Jeddeloh; Joe M. ;   et al.
2018-04-26
Switched interface stacked-die memory architecture
Grant 9,875,814 - Jeddeloh , et al. January 23, 2
2018-01-23
Multi-serial interface stacked-die memory architecture
Grant 9,524,254 - Jeddeloh , et al. December 20, 2
2016-12-20
Switched Interface Stacked-die Memory Architecture
App 20160260503 - Jeddeloh; Joe M. ;   et al.
2016-09-08
Switched interface for stacked-die memory architecture with redundancy for substituting defective memory cells
Grant 9,343,180 - Jeddeloh , et al. May 17, 2
2016-05-17
Memory system and method using stacked memory device dice, and system using the memory system
Grant 9,275,698 - LaBerge , et al. March 1, 2
2016-03-01
Method and apparatus for repairing high capacity/high bandwidth memory devices
Grant 9,146,811 - LaBerge , et al. September 29, 2
2015-09-29
Multi-serial Interface Stacked-die Memory Architecture
App 20140351503 - Jeddeloh; Joe M. ;   et al.
2014-11-27
Memory System And Method Using Stacked Memory Device Dice, And System Using The Memory System
App 20140337570 - LaBerge; Paul A. ;   et al.
2014-11-13
System and method for read synchronization of memory modules
Grant 8,880,833 - Jeddeloh , et al. November 4, 2
2014-11-04
Method And Apparatus For Repairing High Capacity/high Bandwidth Memory Devices
App 20140298119 - LaBerge; Paul A. ;   et al.
2014-10-02
Memory Systems And Methods For Controlling The Timing Of Receiving Read Data
App 20140258666 - LaBerge; Paul A. ;   et al.
2014-09-11
Multi-serial interface stacked-die memory architecture
Grant 8,806,131 - Jeddeloh , et al. August 12, 2
2014-08-12
Memory system and method using stacked memory device dice, and system using the memory system
Grant 8,793,460 - LaBerge , et al. July 29, 2
2014-07-29
Stacked device remapping and repair
Grant 8,787,101 - Keeth , et al. July 22, 2
2014-07-22
Method and apparatus for repairing high capacity/high bandwidth memory devices
Grant 8,756,486 - LaBerge , et al. June 17, 2
2014-06-17
Memory systems and methods for controlling the timing of receiving read data
Grant 8,751,754 - LaBerge , et al. June 10, 2
2014-06-10
Switched Interface Stacked-die Memory Architecture
App 20140112085 - Jeddeloh; Joe M. ;   et al.
2014-04-24
System and method for controlling timing of output signals
Grant 8,705,301 - LaBerge April 22, 2
2014-04-22
Switched interface stacked-die memory architecture
Grant 8,619,481 - Jeddeloh , et al. December 31, 2
2013-12-31
Memory System And Method Using Stacked Memory Device Dice, And System Using The Memory System
App 20130346722 - LaBerge; Paul A. ;   et al.
2013-12-26
Stacked Device Remapping And Repair
App 20130329510 - Keeth; Brent ;   et al.
2013-12-12
Memory Systems And Methods For Controlling The Timing Of Receiving Read Data
App 20130318298 - LaBerge; Paul A. ;   et al.
2013-11-28
System And Method For Controlling Timing Of Output Signals
App 20130241618 - LaBerge; Paul A.
2013-09-19
Memory system and method using stacked memory device dice, and system using the memory system
Grant 8,533,416 - LaBerge , et al. September 10, 2
2013-09-10
Memory systems and methods for controlling the timing of receiving read data
Grant 8,521,979 - LaBerge , et al. August 27, 2
2013-08-27
Stacked device remapping and repair
Grant 8,503,258 - Keeth , et al. August 6, 2
2013-08-06
System And Method For Read Synchronization Of Memory Modules
App 20130179658 - Jeddeloh; Joseph M. ;   et al.
2013-07-11
System and method for controlling timing of output signals
Grant 8,411,521 - LaBerge April 2, 2
2013-04-02
Strobe apparatus, systems, and methods
Grant 8,406,071 - Johnson , et al. March 26, 2
2013-03-26
Stacked Device Remapping And Repair
App 20130003473 - Keeth; Brent ;   et al.
2013-01-03
Switched Interface Stacked-die Memory Architecture
App 20120320688 - Jeddeloh; Joe M. ;   et al.
2012-12-20
Stacked device remapping and repair
Grant 8,320,206 - Keeth , et al. November 27, 2
2012-11-27
Switched interface stacked-die memory architecture
Grant 8,254,191 - Jeddeloh , et al. August 28, 2
2012-08-28
Strobe Apparatus, Systems, And Methods
App 20120213012 - Johnson; James Brian ;   et al.
2012-08-23
System and method for an asynchronous data buffer having buffer write and read pointers
Grant 8,239,607 - LaBerge August 7, 2
2012-08-07
Strobe apparatus, systems, and methods
Grant 8,169,841 - Johnson , et al. May 1, 2
2012-05-01
Delay line synchronizer apparatus and method
Grant 8,164,375 - LaBerge April 24, 2
2012-04-24
Memory System And Method Using Stacked Memory Device Dice, And System Using The Memory System
App 20110296227 - LaBerge; Paul A. ;   et al.
2011-12-01
Capturing read data
Grant 8,065,461 - LaBerge November 22, 2
2011-11-22
Multi-serial Interface Stacked-die Memory Architecture
App 20110264858 - Jeddeloh; Joe M. ;   et al.
2011-10-27
System And Method For Controlling Timing Of Output Signals
App 20110231143 - LaBerge; Paul A.
2011-09-22
Memory system and method using stacked memory device dice, and system using the memory system
Grant 8,010,866 - LaBerge , et al. August 30, 2
2011-08-30
Memory devices with buffered command address bus
Grant 8,006,057 - LaBerge August 23, 2
2011-08-23
Multi-serial interface stacked-die memory architecture
Grant 7,978,721 - Jeddeloh , et al. July 12, 2
2011-07-12
System and method for controlling timing of output signals
Grant 7,969,815 - LaBerge June 28, 2
2011-06-28
Memory System And Method Using Stacked Memory Device Dice, And System Using The Memory System
App 20110075497 - LABERGE; PAUL A. ;   et al.
2011-03-31
System And Method For Controlling Timing Of Output Signals
App 20110069561 - LaBerge; Paul A.
2011-03-24
Stacked Device Remapping And Repair
App 20110060888 - Keeth; Brent ;   et al.
2011-03-10
Capturing Read Data
App 20110047312 - LaBerge; Paul A.
2011-02-24
System and method for controlling timing of output signals
Grant 7,855,928 - LaBerge December 21, 2
2010-12-21
Memory system and method using stacked memory device dice, and system using the memory system
Grant 7,855,931 - LaBerge , et al. December 21, 2
2010-12-21
Stacked device remapping and repair
Grant 7,835,207 - Keeth , et al. November 16, 2
2010-11-16
Capturing read data
Grant 7,822,904 - LaBerge October 26, 2
2010-10-26
Method and apparatus for data transfer
Grant 7,818,601 - LaBerge October 19, 2
2010-10-19
Strobe Apparatus, Systems, And Methods
App 20100188906 - Johnson; James Brian ;   et al.
2010-07-29
Memory Devices With Buffered Command Address Bus
App 20100138598 - LaBerge; Paul A.
2010-06-03
Switched Interface Stacked-die Memory Architecture
App 20100110745 - Jeddeloh; Joe M. ;   et al.
2010-05-06
Integrated testing apparatus, systems, and methods
Grant 7,707,473 - LaBerge , et al. April 27, 2
2010-04-27
Stacked Device Remapping And Repair
App 20100085825 - Keeth; Brent ;   et al.
2010-04-08
Memory devices with buffered command address bus
Grant 7,673,094 - LaBerge March 2, 2
2010-03-02
Delay Line Synchronizer Apparatus And Method
App 20100019822 - LaBerge; Paul A.
2010-01-28
Memory System And Method Using Stacked Memory Device Dice, And System Using The Memory System
App 20100014364 - LABERGE; PAUL A. ;   et al.
2010-01-21
Method And Apparatus For Repairing High Capacity/high Bandwidth Memory Devices
App 20100005376 - LaBerge; Paul A. ;   et al.
2010-01-07
Multi-serial Interface Stacked-die Memory Architecture
App 20100005238 - Jeddeloh; Joe M. ;   et al.
2010-01-07
System And Method For An Asynchronous Data Buffer Having Buffer Write And Read Pointers
App 20090319745 - LaBerge; Paul A.
2009-12-24
Memory Systems And Methods For Controlling The Timing Of Receiving Read Data
App 20090300314 - LaBerge; Paul A. ;   et al.
2009-12-03
System and method for testing integrated circuit timing margins
Grant 7,619,404 - LaBerge November 17, 2
2009-11-17
Delay line synchronizer apparatus and method
Grant 7,605,631 - LaBerge October 20, 2
2009-10-20
System and method for an asynchronous data buffer having buffer write and read pointers
Grant 7,594,088 - LaBerge September 22, 2
2009-09-22
Dynamic command and/or address mirroring system and method for memory modules
Grant 7,546,435 - LaBerge June 9, 2
2009-06-09
Testing system and method allowing adjustment of signal transmit timing
Grant 7,526,704 - LaBerge April 28, 2
2009-04-28
System and method for an asynchronous data buffer having buffer write and read pointers
Grant 7,519,788 - LaBerge April 14, 2
2009-04-14
On-die termination snooping for 2T applications in a memory system implementing non-self-terminating ODT schemes
Grant 7,516,281 - LaBerge April 7, 2
2009-04-07
System And Method For Controlling Timing Of Output Signals
App 20080211557 - LaBerge; Paul A.
2008-09-04
Method and Apparatus for Data Transfer
App 20080155141 - LaBerge; Paul A.
2008-06-26
System and method for controlling timing of output signals
Grant 7,379,382 - LaBerge May 27, 2
2008-05-27
System and method for testing integrated circuit timing margins
Grant 7,355,387 - LaBerge April 8, 2
2008-04-08
Method and apparatus for data transfer
Grant 7,356,723 - LaBerge April 8, 2
2008-04-08
Method and apparatus for supplementary command bus
Grant 7,339,838 - LaBerge March 4, 2
2008-03-04
Integrated testing apparatus, systems, and methods
App 20080052585 - LaBerge; Paul A. ;   et al.
2008-02-28
System and method for testing write strobe timing margins in memory devices
Grant 7,284,169 - LaBerge , et al. October 16, 2
2007-10-16
Modified persistent auto precharge command protocol system and method for memory devices
Grant 7,277,996 - LaBerge , et al. October 2, 2
2007-10-02
Dynamic command and/or address mirroring system and method for memory modules
App 20070143553 - LaBerge; Paul A.
2007-06-21
System and method for testing write strobe timing margins in memory devices
App 20070136627 - LaBerge; Paul A. ;   et al.
2007-06-14
Method for modifying an integrated circuit
Grant 7,222,325 - LaBerge May 22, 2
2007-05-22
System and method for controlling timing of output signals
App 20070097778 - LaBerge; Paul A.
2007-05-03
System and method for varying test signal durations and assert times for testing memory devices
App 20070083800 - LaBerge; Paul A.
2007-04-12
Memory devices with buffered command address bus
App 20070079049 - LaBerge; Paul A.
2007-04-05
Testing system and method allowing adjustment of signal transmit timing
App 20070046309 - LaBerge; Paul A.
2007-03-01
Dynamic command and/or address mirroring system and method for memory modules
Grant 7,181,584 - LaBerge February 20, 2
2007-02-20
Memory devices with buffered command address bus
Grant 7,149,841 - LaBerge December 12, 2
2006-12-12
Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing
Grant 7,139,852 - LaBerge November 21, 2
2006-11-21
Modified persistent auto precharge command protocol system and method for memory devices
Grant 7,124,260 - LaBerge , et al. October 17, 2
2006-10-17
Modified persistent auto precharge command protocol system and method for memory devices
App 20060203584 - LaBerge; Paul A. ;   et al.
2006-09-14
System and method for an asynchronous data buffer having buffer write and read pointers
App 20060200642 - LaBerge; Paul A.
2006-09-07
Method and apparatus for data transfer
Grant 7,076,678 - LaBerge July 11, 2
2006-07-11
Latency reduction using negative clock edge and read flags
Grant 7,055,012 - LaBerge , et al. May 30, 2
2006-05-30
Delay line synchronizer apparatus and method
App 20060066375 - LaBerge; Paul A.
2006-03-30
System and method for an asynchronous data buffer having buffer write and read pointers
App 20050286506 - LaBerge, Paul A.
2005-12-29
Delay line synchronizer apparatus and method
Grant 6,980,042 - LaBerge December 27, 2
2005-12-27
On-die termination snooping for 2T applications in a dynamic random access memory device
App 20050268059 - LaBerge, Paul A.
2005-12-01
Delay Line Synchronizer Apparatus And Method
App 20050218956 - LaBerge, Paul A.
2005-10-06
Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing
App 20050182894 - LaBerge, Paul A.
2005-08-18
Dynamic command and/or address mirroring system and method for memory modules
App 20050177690 - LaBerge, Paul A.
2005-08-11
Bus arbitration using monitored windows of time
Grant 6,910,088 - LaBerge June 21, 2
2005-06-21
Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing
Grant 6,898,648 - LaBerge May 24, 2
2005-05-24
System and method for multiplexing data and data masking information on a data bus of a memory device
Grant 6,888,760 - LaBerge May 3, 2
2005-05-03
Method And Apparatus For Supplementary Command Bus
App 20050088902 - LaBerge, Paul A.
2005-04-28
Cas latency select utilizing multilevel signaling
Grant 6,880,094 - LaBerge April 12, 2
2005-04-12
Method and apparatus for supplementary command bus
Grant 6,876,589 - LaBerge April 5, 2
2005-04-05
Latency reduction using negative clock edge and read flags
App 20050027959 - LaBerge, Paul A. ;   et al.
2005-02-03
Latency reduction using negative clock edge and read flags
Grant 6,851,032 - LaBerge , et al. February 1, 2
2005-02-01
Capturing read data
App 20040210702 - LaBerge, Paul A.
2004-10-21
Technique for reducing memory latency during a memory request
Grant 6,804,750 - LaBerge October 12, 2
2004-10-12
Write clock and data window tuning based on rank select
Grant 6,804,764 - LaBerge , et al. October 12, 2
2004-10-12
Memory devices with buffered command address bus
App 20040193777 - LaBerge, Paul A.
2004-09-30
Method and apparatus for an adjustable delay circuit having arranged serially coarse stages received by a fine delay stage
Grant 6,795,931 - LaBerge September 21, 2
2004-09-21
Method And Apparatus For Supplementary Command Bus
App 20040170071 - LaBerge, Paul A.
2004-09-02
System and method for multiplexing data and data masking information on a data bus of a memory device
App 20040162934 - LaBerge, Paul A.
2004-08-19
Method and apparatus for data transfer
Grant 6,771,526 - LaBerge August 3, 2
2004-08-03
Capturing read data
Grant 6,763,416 - LaBerge July 13, 2
2004-07-13
Method for modifying an integrated circuit
App 20040098702 - LaBerge, Paul A.
2004-05-20
Placing gates in an integrated circuit based upon drive strength
Grant 6,732,342 - LaBerge May 4, 2
2004-05-04
Method and apparatus for supplementary command bus
Grant 6,728,150 - LaBerge April 27, 2
2004-04-27
Bus arbitration
App 20040073733 - LaBerge, Paul A.
2004-04-15
System and method for multiplexing data and data masking information on a data bus of a memory device
Grant 6,714,460 - LaBerge March 30, 2
2004-03-30
Modified persistent auto precharge command protocol system and method for memory devices
App 20040039883 - LaBerge, Paul A. ;   et al.
2004-02-26
Latency reduction using negative clock edge and read flags
App 20040034755 - LaBerge, Paul A. ;   et al.
2004-02-19
Method and device to use memory access request tags
Grant 6,684,303 - LaBerge January 27, 2
2004-01-27
Method and device to use memory access request tags
Grant 6,678,803 - LaBerge January 13, 2
2004-01-13
Bus arbitration
Grant 6,654,833 - LaBerge November 25, 2
2003-11-25
Circuit synthesis time budgeting based upon wireload information
Grant 6,647,541 - LaBerge November 11, 2
2003-11-11
Method and device to use memory access request tags
App 20030191920 - LaBerge, Paul A.
2003-10-09
System and method for regulating data capture in response to data strobe using preamble, postamble and strobe signature
Grant 6,615,345 - LaBerge September 2, 2
2003-09-02
System and method for multiplexing data and data masking information on a data bus of a memory device
App 20030156465 - LaBerge, Paul A.
2003-08-21
Memory bus polarity indicator system and method for reducing the affects of simultaneous switching outputs (SSO) on memory bus timing
App 20030158981 - LaBerge, Paul A.
2003-08-21
Method and apparatus for supplementary command bus
App 20030151963 - LaBerge, Paul A.
2003-08-14
Methods and apparatus for accessing configuration data
App 20030151939 - LaBerge, Paul A.
2003-08-14
Method and apparatus for data transfer
App 20030154416 - LaBerge, Paul A.
2003-08-14
Method for modifying an integrated circuit
Grant 6,601,228 - LaBerge July 29, 2
2003-07-29
Speculative read operation
App 20030140202 - LaBerge, Paul A.
2003-07-24
Write clock and data window tuning based on rank select
App 20030140208 - LaBerge, Paul A. ;   et al.
2003-07-24
Cas latency select utilizing multilevel signaling
App 20030133331 - LaBerge, Paul A.
2003-07-17
Memory cache with sequential page indicators
Grant 6,526,497 - LaBerge , et al. February 25, 2
2003-02-25
Reducing memory latency by not performing bank conflict checks on idle banks
Grant 6,425,045 - LaBerge July 23, 2
2002-07-23
Memory cache with sequential page indicators
Grant 6,330,654 - LaBerge , et al. December 11, 2
2001-12-11
Processing memory requests that target memory banks
App 20010044885 - LaBerge, Paul A.
2001-11-22
Method and apparatus to reduce memory read latency
Grant 6,321,315 - LaBerge November 20, 2
2001-11-20
Method And Device To Use Memory Access Request Tags
App 20010042180 - LABERGE, PAUL A.
2001-11-15
Circuit synthesis time budgeting based upon wireload information
App 20010032331 - LaBerge, Paul A.
2001-10-18
Placing gates in an integrated circuit based upon drive strength
App 20010013114 - LaBerge, Paul A.
2001-08-09
Circuit synthesis time budgeting based upon wireload information
Grant 6,233,724 - LaBerge May 15, 2
2001-05-15
Method of peer-to-peer mastering over a computer bus
Grant 6,223,238 - Meyer , et al. April 24, 2
2001-04-24
Method and system for apportioning computer bus bandwidth
Grant 6,145,040 - LaBerge , et al. November 7, 2
2000-11-07
Method for blocking bus transactions during reset
Grant 6,134,656 - LaBerge October 17, 2
2000-10-17
Device for blocking bus transactions during reset
Grant 6,108,778 - LaBerge August 22, 2
2000-08-22
Programmable logic block in an integrated circuit
Grant 6,075,381 - LaBerge June 13, 2
2000-06-13
System for peer-to-peer mastering over a computer bus
Grant 6,073,198 - Meyer , et al. June 6, 2
2000-06-06
Programmable error detect/mask utilizing bus history stack
Grant 6,012,148 - Laberge , et al. January 4, 2
2000-01-04
Method and system for concurrent computer transaction processing
Grant 5,991,843 - Porterfield , et al. November 23, 1
1999-11-23
Method and system for concurrent computer transaction processing
Grant 5,978,872 - Porterfield , et al. November 2, 1
1999-11-02
Method and system for concurrent computer transaction processing
Grant 5,878,235 - Porterfield , et al. March 2, 1
1999-03-02
Method and system for apportioning computer bus bandwidth
Grant 5,771,358 - LaBerge June 23, 1
1998-06-23
Method and system for apportioning computer bus bandwidth
Grant 5,740,380 - LaBerge , et al. April 14, 1
1998-04-14
Bus grant overlap circuit
Grant 5,671,369 - LaBerge , et al. September 23, 1
1997-09-23
Multiple power domain power loss detection and interface disable
Grant 5,664,089 - Byers , et al. September 2, 1
1997-09-02

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