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name:-0.0094189643859863
name:-0.0003969669342041
La Malfa; Antonino Patent Filings

La Malfa; Antonino

Patent Applications and Registrations

Patent applications and USPTO patent grants for La Malfa; Antonino.The latest application filed is for "password protected built-in test mode for memories".

Company Profile
0.9.7
  • La Malfa; Antonino - Catania IT
  • La Malfa; Antonino - 95124 Catania IT
  • La Malfa; Antonino - Milazzo IT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Password protected built-in test mode for memories
Grant 8,844,023 - La Malfa , et al. September 23, 2
2014-09-23
Password Protected Built-In Test Mode For Memories
App 20100138915 - La Malfa; Antonino ;   et al.
2010-06-03
Circuit for generating an internal enabling signal for an output buffer of a memory
Grant 7,535,774 - La Malfa , et al. May 19, 2
2009-05-19
Enhancement of power on reliability in a dual power supply digital device with down converter
Grant 7,336,117 - La Malfa , et al. February 26, 2
2008-02-26
Enhancement Of Power On Reliability In A Dual Power Supply Digital Device With Down Converter
App 20080012621 - LA MALFA; Antonino ;   et al.
2008-01-17
Automatic decoding method for mapping and selecting a non-volatile memory device having a LPC serial communication interface in the available addressing area on motherboards
Grant 7,231,487 - Schillaci , et al. June 12, 2
2007-06-12
Method for soft-programming an electrically erasable nonvolatile memory device, and an electrically erasable nonvolatile memory device implementing the soft-programming method
Grant 7,120,062 - La Malfa , et al. October 10, 2
2006-10-10
Random bit sequence generator
Grant 7,099,906 - Messina , et al. August 29, 2
2006-08-29
Circuit for generating an internal enabling signal for an output buffer of a memory
App 20060181311 - La Malfa; Antonino ;   et al.
2006-08-17
Structure for updating a block of memory cells in a flash memory device with erase and program operation reduction
Grant 6,922,362 - La Malfa , et al. July 26, 2
2005-07-26
Fast page programming architecture and method in a non-volatile memory device with an SPI interface
Grant 6,885,584 - Schillaci , et al. April 26, 2
2005-04-26
Fast Page Programming Architecture And Method In A Non-volatile Memory Device With An Spi Interface
App 20050041471 - Schillaci, Paolino ;   et al.
2005-02-24
Method for soft-programming an electrically erasable nonvolatile memory device, and an electrically erasable nonvolatile memory device implementing the soft-programming method
App 20040223361 - La Malfa, Antonino ;   et al.
2004-11-11
Structure for updating a block of memory cells in a flash memory device with erase and program operation reduction
App 20040141379 - La Malfa, Antonino ;   et al.
2004-07-22
Automatic decoding method for mapping and selecting a non-volatile memory device having a LPC serial communication interface in the available addressing area on motherboards
App 20040083327 - Schillaci, Paolino ;   et al.
2004-04-29

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