Kwong; Dim-Lee

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kwong; Dim-Lee.The latest application filed is for "wafer arrangement and a method for manufacturing the wafer arrangement".

Company Profile

0.23.10

Kwong; Dim-Lee - Singapore SG
Kwong; Dim-Lee - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Wafer arrangement and a method for manufacturing the wafer arrangement Grant 8,319,302 - Zhang , et al. November 27, 2	2012-11-27
Wafer Arrangement And A Method For Manufacturing The Wafer Arrangement App 20100219496 - Zhang; Qingxin ; et al.	2010-09-02
Schottky barrier source/drain N-MOSFET using ytterbium silicide App 20090179281 - Zhu; Shiyang ; et al.	2009-07-16
Schottky barrier source/drain N-MOSFET using ytterbium silicide App 20090163005 - Zhu; Shiyang ; et al.	2009-06-25
Thermal robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof Grant 7,514,360 - Yu , et al. April 7, 2	2009-04-07
Method of forming a Yb-doped Ni full silicidation low work function gate electrode for n-MOSFET Grant 7,504,329 - Yu , et al. March 17, 2	2009-03-17
Schottky barrier source/drain n-mosfet using ytterbium silicide Grant 7,504,328 - Zhu , et al. March 17, 2	2009-03-17
Metal Gate Electrode For Semiconductor Devices App 20080224236 - Ren; Chi ; et al.	2008-09-18
Photodetector App 20060260676 - Gao; Fei ; et al.	2006-11-23
Metal gate electrode for semiconductor devices App 20050285208 - Ren, Chi ; et al.	2005-12-29
Schottky barrier source/drain N-MOSFET using ytterbium silicide App 20050275033 - Zhu, Shiyang ; et al.	2005-12-15
Thermal robust semiconductor device using HfN as metal gate electrode and the manufacturing process thereof App 20050205947 - Yu, Hong Yu ; et al.	2005-09-22
Ultrathin high-K gate dielectric with favorable interface properties for improved semiconductor device performance Grant 6,911,707 - Gardner , et al. June 28, 2	2005-06-28
Ultrathin High-k Gate Dielectric With Favorable Interface Properties For Improved Semiconductor Device Performance App 20030057432 - GARDNER, MARK I. ; et al.	2003-03-27
Silicon oxynitride film Grant 6,303,520 - Kwong , et al. October 16, 2	2001-10-16
High charge storage density integrated circuit capacitor App 20010024853 - Wallace, Robert M. ; et al.	2001-09-27
Integrated circuit device and method of making the same using chemical mechanical polishing to remove material in two layers following masking Grant 6,284,586 - Seliskar , et al. September 4, 2	2001-09-04
CMOS transistor design for shared N+/P+ electrode with enhanced device performance Grant 6,252,283 - Gardner , et al. June 26, 2	2001-06-26
Method of forming ultra thin gate dielectric for high performance semiconductor devices Grant 6,245,652 - Gardner , et al. June 12, 2	2001-06-12
Ultra thin oxynitride and nitride/oxide stacked gate dielectrics fabricated by high pressure technology Grant 6,228,779 - Bloom , et al. May 8, 2	2001-05-08
Semiconductor device having metal gate electrode and titanium or tantalum nitride gate dielectric barrier layer and process of fabrication thereof Grant 6,225,168 - Gardner , et al. May 1, 2	2001-05-01
Tunable dielectric constant oxide and method of manufacture Grant 6,211,096 - Allman , et al. April 3, 2	2001-04-03
High K integration of gate dielectric with integrated spacer formation for high speed CMOS Grant 6,207,995 - Gardner , et al. March 27, 2	2001-03-27
Integrated circuit device having a capacitor with the dielectric peripheral region being greater than the dielectric central region Grant 6,115,233 - Seliskar , et al. September 5, 2	2000-09-05
Method of making gate dielectric for sub-half micron MOS transistors including a graded dielectric constant Grant 6,015,739 - Gardner , et al. January 18, 2	2000-01-18
Method for forming metal silicide on a semiconductor surface with minimal effect on pre-existing implants Grant 5,679,585 - Gardner , et al. October 21, 1	1997-10-21
Method of forming high pressure silicon oxynitride gate dielectrics Grant 5,674,788 - Wristers , et al. October 7, 1	1997-10-07
Method for achieving a highly reliable oxide film Grant 5,591,681 - Wristers , et al. January 7, 1	1997-01-07
MOS transistor having improved oxynitride dielectric Grant 5,541,436 - Kwong , et al. July 30, 1	1996-07-30
Method of making an ultra thin dielectric for electronic devices Grant 5,478,765 - Kwong , et al. December 26, 1	1995-12-26
Method of making MOS transistor having improved oxynitride dielectric Grant 5,397,720 - Kwong , et al. March 14, 1	1995-03-14
Method of making a shallow junction by using first and second SOG layers Grant 5,340,770 - Allman , et al. August 23, 1	1994-08-23
Method for forming a bipolar transistor using doped SOG Grant 5,340,752 - Allman , et al. August 23, 1	1994-08-23

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