loadpatents
name:-0.0061941146850586
name:-0.0083351135253906
name:-0.00059080123901367
Kushnick; Eric Patent Filings

Kushnick; Eric

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kushnick; Eric.The latest application filed is for "method and apparatus to provide both high speed and low speed signaling from the high speed transceivers on an field programmable gate array".

Company Profile
0.7.7
  • Kushnick; Eric - Santa Clara CA
  • Kushnick; Eric - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method and apparatus to provide both high speed and low speed signaling from the high speed transceivers on an field programmable gate array
Grant 10,652,131 - Jones , et al.
2020-05-12
Test architecture having multiple FPGA based hardware accelerator blocks for testing multiple DUTs independently
Grant 10,162,007 - Chan , et al. Dec
2018-12-25
Universal test cell
Grant 10,161,962 - Rogel-Favila , et al. Dec
2018-12-25
Universal container for device under test
Grant 9,995,767 - Rogel-Favila , et al. June 12, 2
2018-06-12
Universal test floor system
Grant 9,933,454 - Rogel-Favila , et al. April 3, 2
2018-04-03
High speed tester communication interface between test slice and trays
Grant 9,310,427 - Kushnick , et al. April 12, 2
2016-04-12
Method And Apparatus To Provide Both High Speed And Low Speed Signaling From The High Speed Transceivers On An Field Programmable Gate Array
App 20160036684 - Jones; Michael ;   et al.
2016-02-04
Universal Test Cell
App 20150355231 - ROGEL-FAVILA; Ben ;   et al.
2015-12-10
Universal Test Floor System
App 20150355229 - ROGEL-FAVILA; Ben ;   et al.
2015-12-10
Universal Container For Device Under Test
App 20150355230 - ROGEL-FAVILA; Ben ;   et al.
2015-12-10
High Speed Tester Communication Interface Between Test Slice And Trays
App 20150028908 - KUSHNICK; Eric ;   et al.
2015-01-29
Test Architecture Having Multiple Fpga Based Hardware Accelerator Blocks For Testing Multiple Duts Independently
App 20140236525 - CHAN; Gerald ;   et al.
2014-08-21
Correcting apparatus, PDF measurement apparatus, jitter measurement apparatus, jitter separation apparatus, electric device, correcting method, program, and recording medium
Grant 8,312,327 - Hou , et al. November 13, 2
2012-11-13
Correcting Apparatus, Pdf Measurement Apparatus, Jitter Measurement Apparatus, Jitter Separation Apparatus, Electric Device, Correcting Method, Program, And Recording Medium
App 20100275072 - HOU; HARRY ;   et al.
2010-10-28

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