loadpatents
name:-0.018408060073853
name:-0.018665075302124
name:-0.0025620460510254
Kuo; Ming Hong Patent Filings

Kuo; Ming Hong

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kuo; Ming Hong.The latest application filed is for "apparatus and methods for integrated mems devices".

Company Profile
2.17.17
  • Kuo; Ming Hong - San Jose CA
  • Kuo; Ming-Hong - Hsinchu TW
  • Kuo; Ming-Hong - Hsinchu City TW
  • KUO; MING-HONG - Taipei City TW
  • Kuo, Ming Hong - Taipei TW
  • Kuo; Ming-Hong - Ping-Tung TW
  • Kuo; Ming-Hong - Pintung TW
  • Kuo; Ming-Hong - Pingtung TW
  • Kuo; Ming-Hong - Ping-Ting TW
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Apparatus and methods for integrated MEMS devices
Grant 10,479,676 - Lee , et al. Nov
2019-11-19
Apparatus And Methods For Integrated Mems Devices
App 20180346328 - LEE; Ben ;   et al.
2018-12-06
Apparatus and methods for integrated MEMS devices
Grant 10,046,966 - Lee , et al. August 14, 2
2018-08-14
Dynamic memory structure
Grant 9,935,109 - Lu , et al. April 3, 2
2018-04-03
Apparatus And Methods For Integrated Mems Devices
App 20170283256 - LEE; Ben ;   et al.
2017-10-05
Dynamic Memory Structure
App 20170250185 - Lu; Nicky ;   et al.
2017-08-31
Dynamic memory structure
Grant 9,685,449 - Lu , et al. June 20, 2
2017-06-20
Dynamic Memory Structure
App 20160293607 - Lu; Nicky ;   et al.
2016-10-06
Dynamic memory structure
Grant 9,397,103 - Lu , et al. July 19, 2
2016-07-19
Dynamic Memory Structure
App 20150294974 - Lu; Nicky ;   et al.
2015-10-15
Dynamic memory structure
Grant 9,105,506 - Lu , et al. August 11, 2
2015-08-11
Electroplating Aid Board And Electroplating Device Using Same
App 20140197027 - KUO; MING-HONG
2014-07-17
Transistor circuit layout structure
Grant 8,724,362 - Kuo May 13, 2
2014-05-13
Dynamic memory structure
Grant 8,659,068 - Kuo February 25, 2
2014-02-25
Transmission Mechanism Of Vertical Circuit Board Etching Device
App 20140021017 - KUO; MING-HONG
2014-01-23
Dynamic Memory Structure
App 20130087839 - Kuo; Ming-Hong
2013-04-11
Transistor Circuit Layout Structure
App 20130088907 - Kuo; Ming-Hong
2013-04-11
Dynamic Memory Structure
App 20120326219 - Lu; Nicky ;   et al.
2012-12-27
Memory device capable of operation in a burn in stress mode, method for performing burn in stress on a memory device, and method for detecting leakage current of a memory device
Grant 8,331,178 - Liu , et al. December 11, 2
2012-12-11
Connector Applied To A Portable Device And Method Of Connecting A Portable Device With An External Device
App 20120254470 - Kuo; Ming-Hong ;   et al.
2012-10-04
Memory Device Capable Of Operation In A Burn In Stress Mode, Method For Performing Burn In Stress On A Memory Device, And Method For Detecting Leakage Current Of A Memory Device
App 20120163107 - Liu; Shi-Huei ;   et al.
2012-06-28
Re-routing method and the circuit thereof
App 20080202800 - Kuo; Ming-Hong ;   et al.
2008-08-28
Re-routing method and the circuit thereof
App 20060284635 - Kuo; Ming-Hong ;   et al.
2006-12-21
Transporting device for a vertical-type thin circuit board etching machine
App 20050006205 - Kuo, Ming Hong
2005-01-13
Method of fabricating a capacitor under bit line DRAM structure using contact hole liners
Grant 6,184,081 - Jeng , et al. February 6, 2
2001-02-06
Shallow trench isolator via non-critical chemical mechanical polishing
Grant 6,171,929 - Yang , et al. January 9, 2
2001-01-09
Method of making a shallow trench isolation for ULSI formation via in-direct CMP process
Grant 6,057,210 - Yang , et al. May 2, 2
2000-05-02
Method for fabricating a damascene landing pad
Grant 6,017,813 - Kuo January 25, 2
2000-01-25
Design and a novel process for formation of DRAM bit line and capacitor node contacts
Grant 6,008,085 - Sung , et al. December 28, 1
1999-12-28
Locos method with double polysilicon/silicon nitride spacer
Grant 5,658,822 - Wu , et al. August 19, 1
1997-08-19
Method of forming nitride sidewalls having spacer feet in a locos process
Grant 5,643,824 - Chien , et al. July 1, 1
1997-07-01

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