Kumamoto; Keita
Patent Applications and Registrations
Patent applications and USPTO patent grants for Kumamoto; Keita.The latest application filed is for "contact plug constrained by dielectric portions".
- Kumamoto; Keita - Yokkaichi JP
- Kumamoto; Keita - Mie JP
- Kumamoto; Keita - Kanagawa JP
- Kumamoto; Keita - Tokyo JP
| Patent | Date |
|---|---|
| Source line formation and structure Grant 9,768,183 - Akimoto , et al. September 19, 2 | 2017-09-19 |
| Contact Plug Constrained By Dielectric Portions App 20170040333 - Kumamoto; Keita ; et al. | 2017-02-09 |
| Source Line Formation and Structure App 20160336335 - Akimoto; Shunsuke ; et al. | 2016-11-17 |
| Contact hole collimation using etch-resistant walls Grant 9,466,523 - Kakegawa , et al. October 11, 2 | 2016-10-11 |
| Contact Hole Collimation Using Etch-Resistant Walls App 20160035738 - Kakegawa; Tomoyasu ; et al. | 2016-02-04 |
| Bi-level dry etching scheme for transistor contacts Grant 9,224,637 - Noguchi , et al. December 29, 2 | 2015-12-29 |
| Resistive element and manufacturing method therefor Grant 8,289,126 - Kumamoto October 16, 2 | 2012-10-16 |
| Resistive Element And Manufacturing Method Therefor App 20120098635 - KUMAMOTO; Keita | 2012-04-26 |
| Manufacturing method of semiconductor device Grant 6,962,862 - Kumamoto November 8, 2 | 2005-11-08 |
| Manufacturing method of semiconductor device App 20030022426 - Kumamoto, Keita | 2003-01-30 |
| Semiconductor device and method of manufacturing the same App 20020142550 - Kumamoto, Keita | 2002-10-03 |
| Method of forming a trench isolation structure and semiconductor device App 20020142564 - Kumamoto, Keita | 2002-10-03 |
| Method of forming shallow trench isolation App 20010026995 - Kumamoto, Keita | 2001-10-04 |
| Semiconductor device having bent gate electrode and process for production thereof App 20010020729 - Takahashi, Toshifumi ; et al. | 2001-09-13 |
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