loadpatents
name:-0.020195007324219
name:-0.021059036254883
name:-0.00053882598876953
Kueper; Terrance Wayne Patent Filings

Kueper; Terrance Wayne

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kueper; Terrance Wayne.The latest application filed is for "systems and arrangements to assess thermal performance".

Company Profile
0.14.12
  • Kueper; Terrance Wayne - Rochester MN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor scheme for reduced circuit area in a simplified process
Grant 7,935,629 - Christensen , et al. May 3, 2
2011-05-03
Systems and arrangements to assess thermal performance
Grant 7,734,444 - Arroyo , et al. June 8, 2
2010-06-08
FinFET body contact structure
Grant 7,696,565 - Donze , et al. April 13, 2
2010-04-13
Semiconductor scheme for reduced circuit area in a simplified process
Grant 7,626,220 - Christensen , et al. December 1, 2
2009-12-01
Systems and Arrangements to Assess Thermal Performance
App 20080112456 - Arroyo; Ronald Xavier ;   et al.
2008-05-15
Semiconductor Scheme for Reduced Circuit Area in a Simplified Process
App 20080102627 - Christensen; Todd Alan ;   et al.
2008-05-01
Semiconductor Scheme for Reduced Circuit Area in a Simplified Process
App 20080093683 - Christensen; Todd Alan ;   et al.
2008-04-24
Systems and arrangements to assess thermal performance
Grant 7,338,818 - Arroyo , et al. March 4, 2
2008-03-04
Semiconductor scheme for reduced circuit area in a simplified process
Grant 7,317,217 - Christensen , et al. January 8, 2
2008-01-08
Method and apparatus for improving performance margin in logic paths
Grant 7,317,605 - Donze , et al. January 8, 2
2008-01-08
FinFET Body Contact Structure
App 20070202659 - Donze; Richard Lee ;   et al.
2007-08-30
FinFET body contact structure
Grant 7,241,649 - Donze , et al. July 10, 2
2007-07-10
Polysilicon Conductor Width Measurement for 3-Dimensional FETs
App 20070128740 - Donze; Richard Lee ;   et al.
2007-06-07
Polysilicon conductor width measurement for 3-dimensional FETs
Grant 7,227,183 - Donze , et al. June 5, 2
2007-06-05
Method, apparatus and computer program product for implementing thermal integrity screening
Grant 7,184,924 - Shabino , et al. February 27, 2
2007-02-27
Systems and arrangements to assess thermal performance
App 20060263912 - Arroyo; Ronald Xavier ;   et al.
2006-11-23
FinFET body contact structure
App 20060091463 - Donze; Richard Lee ;   et al.
2006-05-04
Polysilicon conductor width measurement for 3-dimensional FETs
App 20060063317 - Donze; Richard Lee ;   et al.
2006-03-23
Semiconductor scheme for reduced circuit area in a simplified process
App 20060060926 - Christensen; Todd Alan ;   et al.
2006-03-23
Method and apparatus to reduce bias temperature instability (BTI) effects
Grant 7,009,905 - Aipperspach , et al. March 7, 2
2006-03-07
Method and apparatus for improving performance margin in logic paths
App 20050201188 - Donze, Richard Lee ;   et al.
2005-09-15
Method and apparatus to reduce bias temperature instability (BTI) effects
App 20050134360 - Aipperspach, Anthony Gus ;   et al.
2005-06-23
Method and testing circuit for tracking transistor stress degradation
Grant 6,879,177 - Bolam , et al. April 12, 2
2005-04-12
Ring oscillator circuit for EDRAM/DRAM performance monitoring
Grant 6,774,734 - Christensen , et al. August 10, 2
2004-08-10
Ring Oscillator Circuit For Edram/dram Performance Monitoring
App 20040100336 - Christensen, Todd Alan ;   et al.
2004-05-27
Zero Sense After Peak Detection Circuit
Grant 3,767,938 - Kueper October 23, 1
1973-10-23

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