loadpatents
name:-0.027757883071899
name:-0.025741100311279
name:-0.02140998840332
Kuenle; Matthias Patent Filings

Kuenle; Matthias

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kuenle; Matthias.The latest application filed is for "method for producing a superjunction device".

Company Profile
15.14.20
  • Kuenle; Matthias - Villach AT
  • Kuenle; Matthias - Villach-Landskron AT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Method for Producing a Superjunction Device
App 20220052182 - Tutuc; Daniel ;   et al.
2022-02-17
Methods for Forming a Semiconductor Device
App 20220037165 - Schulze; Hans-Joachim ;   et al.
2022-02-03
Substrate Processing Chamber And Process Gas Flow Deflector For Use In The Processing Chamber
App 20220018023 - Kuenle; Matthias ;   et al.
2022-01-20
Apparatus and method for chemical vapor deposition process for semiconductor substrates
Grant 11,149,351 - Kuenle , et al. October 19, 2
2021-10-19
Insulated gate bipolar transistor having first and second field stop zone portions and manufacturing method
Grant 11,004,963 - Spulber , et al. May 11, 2
2021-05-11
Method for manufacturing a semiconductor device
Grant 10,825,716 - Moser , et al. November 3, 2
2020-11-03
Method for manufacturing a power semiconductor device having a reduced oxygen concentration
Grant 10,727,311 - Schmidt , et al.
2020-07-28
Method of manufacturing a power semiconductor device
Grant 10,529,809 - Kuenle , et al. J
2020-01-07
Method for Processing a Semiconductor Wafer, Semiconductor Composite Structure and Support Structure for Semiconductor Wafer
App 20190363057 - Santos Rodriguez; Francisco Javier ;   et al.
2019-11-28
Buried insulator regions and methods of formation thereof
Grant 10,410,911 - Schaeffer , et al. Sept
2019-09-10
Semiconductor wafer and method for processing a semiconductor wafer
Grant 10,325,803 - Kuenle , et al.
2019-06-18
Insulated Gate Bipolar Transistor Having First and Second Field Stop Zone Portions and Manufacturing Method
App 20190165151 - Spulber; Oana Julia ;   et al.
2019-05-30
Method of Manufacturing a Power Semiconductor Device
App 20190157401 - Kuenle; Matthias ;   et al.
2019-05-23
Method for Manufacturing a Semiconductor Device
App 20190148217 - Moser; Andreas ;   et al.
2019-05-16
Producing a semiconductor device by epitaxial growth
Grant 10,243,066 - Schloegl , et al.
2019-03-26
Apparatus And Method For Chemical Vapor Deposition Process For Semiconductor Substrates
App 20190078211 - Kuenle; Matthias ;   et al.
2019-03-14
Method for Manufacturing a Power Semiconductor Device Having a Reduced Oxygen Concentration
App 20190035909 - Schmidt; Gerhard ;   et al.
2019-01-31
Power semiconductor device
Grant 10,186,587 - Kuenle , et al. Ja
2019-01-22
Semiconductor Wafer And Method For Processing A Semiconductor Wafer
App 20180247857 - KUENLE; Matthias ;   et al.
2018-08-30
Buried Insulator Regions and Methods of Formation Thereof
App 20180166324 - Schaeffer; Carsten ;   et al.
2018-06-14
Semiconductor wafer and method for processing a semiconductor wafer
Grant 9,984,915 - Kuenle , et al. May 29, 2
2018-05-29
Power Semiconductor Device
App 20170373157 - Kuenle; Matthias ;   et al.
2017-12-28
Semiconductor device including a vertical PN junction between a body region and a drift region
Grant 9,793,387 - Hutzler , et al. October 17, 2
2017-10-17
Method of forming a trench using epitaxial lateral overgrowth
Grant 9,768,273 - Joshi , et al. September 19, 2
2017-09-19
Producing a Semiconductor Device by Epitaxial Growth
App 20170243963 - Schloegl; Daniel ;   et al.
2017-08-24
Method of Manufacturing Semiconductor Devices Including Deposition of Crystalline Silicon in Trenches
App 20170221988 - Baumgartl; Johannes ;   et al.
2017-08-03
Producing a semiconductor device by epitaxial growth
Grant 9,647,083 - Schloegl , et al. May 9, 2
2017-05-09
Semiconductor Device Including a Vertical PN Junction Between a Body Region and a Drift Region
App 20170054012 - Hutzler; Michael ;   et al.
2017-02-23
Producing a Semiconductor Device by Epitaxial Growth
App 20160322472 - Schloegl; Daniel ;   et al.
2016-11-03
Method of Forming a Trench Using Epitaxial Lateral Overgrowth
App 20160308028 - Joshi; Ravi ;   et al.
2016-10-20
Method of forming a trench using epitaxial lateral overgrowth and deep vertical trench structure
Grant 9,379,196 - Joshi , et al. June 28, 2
2016-06-28
Semiconductor Wafer And Method For Processing A Semiconductor Wafer
App 20150348824 - Kuenle; Matthias ;   et al.
2015-12-03
Method of Forming a Trench Using Epitaxial Lateral Overgrowth and Deep Vertical Trench Structure
App 20150221735 - Joshi; Ravi ;   et al.
2015-08-06
Carbon Layers for High Temperature Processes
App 20140335700 - Denifl; Guenter ;   et al.
2014-11-13

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