Kudryavtsev; Valeriy B.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kudryavtsev; Valeriy B..The latest application filed is for "process and apparatus for placement of megacells in ics design".

Company Profile

0.16.1

Kudryavtsev; Valeriy B. - Moscow RU

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Process and apparatus for placement of megacells in ICs design Grant 7,103,865 - Galatenko , et al. September 5, 2	2006-09-05
Process and apparatus for placement of megacells in ICs design App 20050114813 - Galatenko, Alexei V. ; et al.	2005-05-26
Hexagonal architecture Grant 6,407,434 - Rostoker , et al. June 18, 2	2002-06-18
Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints Grant 6,134,702 - Scepanovic , et al. October 17, 2	2000-10-17
Triangular semiconductor or gate Grant 6,097,073 - Rostoker , et al. August 1, 2	2000-08-01
Architecture having diamond shaped or parallelogram shaped cells Grant 5,973,376 - Rostoker , et al. October 26, 1	1999-10-26
Physical design automation system and process for designing integrated circuit chips using highly parallel sieve optimization with multiple "jiggles" Grant 5,909,376 - Scepanovic , et al. June 1, 1	1999-06-01
Triangular semiconductor NAND gate Grant 5,864,165 - Rostoker , et al. January 26, 1	1999-01-26
Physical design automation system and method using monotonically improving linear clusterization Grant 5,838,585 - Scepanovic , et al. November 17, 1	1998-11-17
Triangular semiconductor "AND" gate device Grant 5,834,821 - Rostoker , et al. November 10, 1	1998-11-10
Transistors having dynamically adjustable characteristics Grant 5,811,863 - Rostoker , et al. September 22, 1	1998-09-22
Hexagonal SRAM architecture Grant 5,801,422 - Rostoker , et al. September 1, 1	1998-09-01
Hexagonal field programmable gate array architecture Grant 5,777,360 - Rostoker , et al. July 7, 1	1998-07-07
Hexagonal DRAM array Grant 5,742,086 - Rostoker , et al. April 21, 1	1998-04-21
Physical design automation system and process for designing integrated circuit chips using multiway partitioning with constraints Grant 5,699,265 - Scepanovic , et al. December 16, 1	1997-12-16
Physical design automation system and method using hierarchical clusterization and placement improvement based on complete re-placement of cell clusters Grant 5,661,663 - Scepanovic , et al. August 26, 1	1997-08-26
Microelectronic integrated circuit including triangular CMOS "nand" gate device Grant 5,650,653 - Rostoker , et al. July 22, 1	1997-07-22

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