loadpatents
name:-0.011009931564331
name:-0.018093109130859
name:-0.0018060207366943
Krueger; Steven D. Patent Filings

Krueger; Steven D.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Krueger; Steven D..The latest application filed is for "dynamic selection of memory management algorithm".

Company Profile
0.18.7
  • Krueger; Steven D. - Austin TX
  • Krueger; Steven D. - Dallas TX
  • Krueger; Steven D. - Houston TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Dynamic selection of memory management algorithm
Grant 9,454,313 - Hinds , et al. September 27, 2
2016-09-27
Dynamic Selection Of Memory Management Algorithm
App 20150355851 - HINDS; Christopher Neal ;   et al.
2015-12-10
On-demand predicate registers
Grant 8,707,013 - Sankaran , et al. April 22, 2
2014-04-22
System Caching Using Heterogenous Memories
App 20130046934 - Nychka; Robert ;   et al.
2013-02-21
On-demand Predicate Registers
App 20120017067 - SANKARAN; Jagadeesh ;   et al.
2012-01-19
Method and apparatus for producing an index vector for use in performing a vector permute operation
App 20060184765 - Krueger; Steven D.
2006-08-17
System protection map
Grant 6,775,750 - Krueger August 10, 2
2004-08-10
Cache memory controlled by system address properties
Grant 6,629,187 - Krueger , et al. September 30, 2
2003-09-30
Apparatus and method for a software pipeline loop procedure in a digital signal processor
App 20030120900 - Stotzer, Eric J. ;   et al.
2003-06-26
Microprocessor with non-aligned memory access
Grant 6,539,467 - Anderson , et al. March 25, 2
2003-03-25
System protection map
App 20030018860 - Krueger, Steven D.
2003-01-23
Prefetch circuity for prefetching variable size data
Grant 6,195,735 - Krueger , et al. February 27, 2
2001-02-27
Class categorized storage circuit for storing non-cacheable data until receipt of a corresponding terminate signal
Grant 6,173,368 - Krueger , et al. January 9, 2
2001-01-09
High-speed memory arranged for operating synchronously with a microprocessor
Grant 6,088,280 - Vogley , et al. July 11, 2
2000-07-11
Configurable expansion bus controller in a microprocessor-based system
Grant 6,085,269 - Chan , et al. July 4, 2
2000-07-04
Microprocessor system with burstable, non-cacheable memory access support
Grant 6,032,225 - Shiell , et al. February 29, 2
2000-02-29
Circuits, systems, and methods with a memory interface for augmenting precharge control
Grant 6,002,632 - Krueger December 14, 1
1999-12-14
Random access memory with latency arranged for operating synchronously with a micro processor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock
Grant 5,808,958 - Vogley , et al. September 15, 1
1998-09-15
Memory module including read-write memory and read-only configuration memory accessed only sequentially and computer system using at least one such module
Grant 5,598,540 - Krueger January 28, 1
1997-01-28
Random access memory arranged for operating synchronously with a microprocessor and a system including a data processor, a synchronous DRAM, a peripheral device, and a system clock
Grant 5,587,954 - Vogley , et al. December 24, 1
1996-12-24
System including a data processor, a synchronous dram, a peripheral device, and a system clock
Grant 5,390,149 - Vogley , et al. February 14, 1
1995-02-14
Data processing apparatus with abbreviated jump field
Grant 5,008,807 - Krueger , et al. April 16, 1
1991-04-16
Data protection for computer systems
Grant 4,962,533 - Krueger , et al. October 9, 1
1990-10-09

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