Krishnan; Bharat

Patent Applications and Registrations

Patent applications and USPTO patent grants for Krishnan; Bharat.The latest application filed is for "device with highly active acceptor doping and method of production thereof".

Company Profile

2.11.15

Krishnan; Bharat - Mechanicville NY
Krishnan; Bharat - Clifton Park NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Device with highly active acceptor doping and method of production thereof Grant 10,886,178 - Lee , et al. January 5, 2	2021-01-05
Device With Highly Active Acceptor Doping And Method Of Production Thereof App 20200066593 - LEE; Tek Po Rinus ; et al.	2020-02-27
Protected trench isolation for fin-type field-effect transistors Grant 10,312,150 - Al-Amoody , et al.	2019-06-04
Siloxane and organic-based MOL contact patterning Grant 10,056,458 - Maeng , et al. August 21, 2	2018-08-21
Formation Of Band-edge Contacts App 20180138177 - LEE; Tek Po Rinus ; et al.	2018-05-17
FORMING DEFECT-FREE RELAXED SiGe FINS App 20180130656 - Holt; Judson Robert ; et al.	2018-05-10
Forming defect-free relaxed SiGe fins Grant 9,882,052 - Holt , et al. January 30, 2	2018-01-30
Forming Defect-free Relaxed Sige Fins App 20180006155 - HOLT; Robert Judson ; et al.	2018-01-04
Siloxane And Organic-based Mol Contact Patterning App 20170200792 - MAENG; Chang Ho ; et al.	2017-07-13
Integrated circuits and methods for their fabrication Grant 9,640,423 - Krishnan , et al. May 2, 2	2017-05-02
Integrated Circuits And Methods For Their Fabrication App 20170033178 - Krishnan; Bharat ; et al.	2017-02-02
Fabricating transistors having resurfaced source/drain regions with stressed portions Grant 9,559,166 - Ray , et al. January 31, 2	2017-01-31
Methods of fabricating integrated circuits Grant 9,472,465 - Lee , et al. October 18, 2	2016-10-18
Fabricating Transistors Having Resurfaced Source/drain Regions With Stressed Portions App 20160225852 - RAY; Shishir ; et al.	2016-08-04
Integrated circuits having finFETs with improved doped channel regions and methods for fabricating same Grant 9,287,180 - Liu , et al. March 15, 2	2016-03-15
Semiconductor Structure With Increased Space And Volume Between Shaped Epitaxial Structures App 20160005657 - KRISHNAN; Bharat ; et al.	2016-01-07
Methods Of Fabricating Integrated Circuits App 20150325681 - Lee; Bongki ; et al.	2015-11-12
Semiconductor structure with increased space and volume between shaped epitaxial structures Grant 9,165,767 - Krishnan , et al. October 20, 2	2015-10-20
Integrated Circuits Having Finfets With Improved Doped Channel Regions And Methods For Fabricating Same App 20150294915 - Liu; Jinping ; et al.	2015-10-15
Integrated Circuits With Stressed Semiconductor Substrates And Processes For Preparing Integrated Circuits Including The Stressed Semiconductor Substrates App 20150287824 - Ray; Shishir ; et al.	2015-10-08
Integrated circuits having FinFETs with improved doped channel regions and methods for fabricating same Grant 9,093,476 - Liu , et al. July 28, 2	2015-07-28
Strained Fin Structures And Methods Of Fabrication App 20150194307 - GAIRE; Churamani ; et al.	2015-07-09
Reducing gate expansion after source and drain implant in gate last process Grant 9,059,218 - Krishnan , et al. June 16, 2	2015-06-16
Increased Space Between Epitaxy On Adjacent Fins Of Finfet App 20150123146 - KRISHNAN; Bharat ; et al.	2015-05-07
Reducing Gate Expansion After Source And Drain Implant In Gate Last Process App 20150076622 - Krishnan; Bharat ; et al.	2015-03-19
Integrated Circuits Having Finfets With Improved Doped Channel Regions And Methods For Fabricating Same App 20150035062 - LIU; Jinping ; et al.	2015-02-05

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