loadpatents
name:-0.0077509880065918
name:-0.0076580047607422
name:-0.001774787902832
Krishnamurthy; Suresh Patent Filings

Krishnamurthy; Suresh

Patent Applications and Registrations

Patent applications and USPTO patent grants for Krishnamurthy; Suresh.The latest application filed is for "system and method for modeling memory devices with latency".

Company Profile
4.8.4
  • Krishnamurthy; Suresh - Noida IN
  • Krishnamurthy; Suresh - Belton TX
  • Krishnamurthy, Suresh - Noida U.P.
  • Krishnamurthy; Suresh - Bangalor IN
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System And Method For Modeling Memory Devices With Latency
App 20220066801 - Selvidge; Charles W. ;   et al.
2022-03-03
Attachment of disk to shaft using a wedge
Grant 11,174,900 - Post , et al. November 16, 2
2021-11-16
Bandwidth test in networking System-on-Chip verification
Grant 10,664,566 - Krishnamurthy , et al.
2020-05-26
Testbench restoration based on capture and replay
Grant 10,664,637 - Krishnamurthy , et al.
2020-05-26
Latency test in networking system-on-chip verification
Grant 10,657,217 - Krishnamurthy , et al.
2020-05-19
Flow control in networking system-on-chip verification
Grant 10,628,548 - Krishnamurthy , et al.
2020-04-21
Attachment Of Disk To Shaft Using A Wedge
App 20180216669 - Post; Alvin Marion ;   et al.
2018-08-02
Compilation of remote procedure calls between a timed HDL model on a reconfigurable hardware platform and an untimed model on a sequential computing platform
Grant 7,260,798 - Gupta , et al. August 21, 2
2007-08-21
Method and system for hardware accelerated verification of digital circuit design and its testbench
Grant 7,257,802 - Daw , et al. August 14, 2
2007-08-14
Compilation of remote procedure calls between a timed HDL model on a reconfigurable hardware platform and an untimed model on a sequential computing platform
App 20050198606 - Gupta, Sanjay ;   et al.
2005-09-08
Method and system for hardware accelerated verification of digital circuit design and its testbench
App 20050144585 - Daw, Jyotirmoy ;   et al.
2005-06-30
Pre-analysis of video signals obtained from digital images
Grant 5,469,188 - Krishnamurthy , et al. November 21, 1
1995-11-21

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