Krishnamurthy; Ram K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Krishnamurthy; Ram K..The latest application filed is for "floating point multiply-accumulate unit for deep learning".

Company Profile

2.72.97

Krishnamurthy; Ram K. - Portland OR
Krishnamurthy; Ram K - Portland OH US
Krishnamurthy; Ram K. - Beaverton OR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Floating Point Multiply-accumulate Unit For Deep Learning App 20220188075 - Raha; Arnab ; et al.	2022-06-16
Reconfigurable neuro-synaptic cores for spiking neural network Grant 11,195,079 - Sumbul , et al. December 7, 2	2021-12-07
Scalable free-running neuromorphic computer Grant 11,100,385 - Kumar , et al. August 24, 2	2021-08-24
Neuromorphic computer with reconfigurable memory mapping for various neural network topologies Grant 11,062,203 - Chen , et al. July 13, 2	2021-07-13
Fused voltage level shifting latch Grant 10,756,736 - Hsu , et al. A	2020-08-25
Neural network with reconfigurable sparse connectivity and online learning Grant 10,713,558 - Sumbul , et al.	2020-07-14
Low-power clock gate circuit Grant 10,491,217 - Hsu , et al. Nov	2019-11-26
Motion estimation for video processing Grant 10,440,377 - Kaul , et al. O	2019-10-08
Low clock supply voltage interruptible sequential Grant 10,418,975 - Agarwal , et al. Sept	2019-09-17
Fused Voltage Level Shifting Latch App 20190280693 - Hsu; Steven K. ; et al.	2019-09-12
Time borrowing flip-flop with clock gating scan multiplexer Grant 10,382,019 - Agarwal , et al. A	2019-08-13
Global And Local Time-step Determination Schemes For Neural Networks App 20190102669 - Chen; Gregory K. ; et al.	2019-04-04
Low-power Clock Gate Circuit App 20190044511 - HSU; Steven ; et al.	2019-02-07
Reconfigurable Neuro-synaptic Cores For Spiking Neural Network App 20190042909 - Sumbul; Huseyin E. ; et al.	2019-02-07
Shared keeper and footer flip-flop Grant 10,193,536 - Agarwal , et al. Ja	2019-01-29
Integrated clock gate circuit with embedded NOR Grant 10,177,765 - Hsu , et al. J	2019-01-08
Time Borrowing Flip-flop With Clock Gating Scan Multiplexer App 20180278243 - Agarwal; Amit ; et al.	2018-09-27
Neural Network With Reconfigurable Sparse Connectivity And Online Learning App 20180189631 - Sumbul; Huseyin Ekin ; et al.	2018-07-05
Scalable Free-running Neuromorphic Computer App 20180189632 - KUMAR; RAGHAVAN ; et al.	2018-07-05
Neuromorphic Computer With Reconfigurable Memory Mapping For Various Neural Network Topologies App 20180189645 - Chen; Gregory K. ; et al.	2018-07-05
Time borrowing flip-flop with clock gating scan multiplexer Grant 9,985,612 - Agarwal , et al. May 29, 2	2018-05-29
Shared Keeper And Footer Flip-flop App 20180145663 - Agarwal; Amit ; et al.	2018-05-24
Combined guaranteed throughput and best effort network-on-chip Grant 9,979,668 - Chen , et al. May 22, 2	2018-05-22
Threshold filtering of compressed domain data using steering vector Grant 9,965,248 - Satpathy , et al. May 8, 2	2018-05-08
Adaptively switched network-on-chip Grant 9,961,019 - Chen , et al. May 1, 2	2018-05-01
Fused Voltage Level Shifting Latch App 20180091150 - Hsu; Steven K. ; et al.	2018-03-29
Low Clock Supply Voltage Interruptible Sequential App 20180069538 - Agarwal; Amit ; et al.	2018-03-08
Integrated Clock Gate Circuit With Embedded Nor App 20180062658 - Hsu; Steven K. ; et al.	2018-03-01
Time Borrowing Flip-flop With Clock Gating Scan Multiplexer App 20180062625 - Agarwal; Amit ; et al.	2018-03-01
Shared keeper and footer flip-flop Grant 9,859,876 - Agarwal , et al. January 2, 2	2018-01-02
Link delay based routing apparatus for a network-on-chip Grant 9,787,571 - De , et al. October 10, 2	2017-10-10
Pattern Matching Circuit App 20170286420 - Agarwal; Amit ; et al.	2017-10-05
Area/energy Complex Regular Expression Pattern Matching Hardware Filter Based On Truncated Deterministic Finite Automata (dfa) App 20170193376 - Agarwal; Amit ; et al.	2017-07-06
Method, apparatus and system for a source-synchronous circuit-switched network on a chip (NOC) Grant 9,652,425 - Chen , et al. May 16, 2	2017-05-16
Architecture and method for hybrid circuit-switched and packet-switched router Grant 9,634,866 - Anders , et al. April 25, 2	2017-04-25
Threshold Filtering Of Compressed Domain Data Using Steering Vector App 20170039034 - SATPATHY; SUDHIR K. ; et al.	2017-02-09
Threshold filtering of compressed domain data using steering vector Grant 9,503,747 - Satpathy , et al. November 22, 2	2016-11-22
Apparatus And Method For Low Power Fully-interruptible Latches And Master-slave Flip-flops App 20160322962 - HSU; Steven K. ; et al.	2016-11-03
Threshold Filtering Of Compressed Domain Data Using Steering Vector App 20160219295 - SATPATHY; SUDHIR K. ; et al.	2016-07-28
Apparatus and method for low power fully-interruptible latches and master-slave flip-flops Grant 9,397,641 - Hsu , et al. July 19, 2	2016-07-19
Hardware-embedded key based on random variations of a stress-hardened inegrated circuit Grant 9,391,617 - Mathew , et al. July 12, 2	2016-07-12
Combined Guaranteed Throughput And Best Effort Network-on-chip App 20160182393 - Chen; Gregory K. ; et al.	2016-06-23
Link Delay Based Routing Apparatus For A Network-on-chip App 20160182354 - De; Vivek K. ; et al.	2016-06-23
Adaptively Switched Network-on-chip App 20160182405 - Chen; Gregory K. ; et al.	2016-06-23
Hybrid CAM assisted deflate decompression accelerator Grant 9,306,596 - Satpathy , et al. April 5, 2	2016-04-05
Using dark bits to reduce physical unclonable function (PUF) error rate without storing dark bits location Grant 9,262,256 - Mathew , et al. February 16, 2	2016-02-16
Hybrid Cam Assisted Deflate Decompression Accelerator App 20150381202 - SATPATHY; SUDHIR K. ; et al.	2015-12-31
Apparatus and method for skein hashing Grant 9,225,521 - Sheikh , et al. December 29, 2	2015-12-29
Apparatus And Method For Low Power Fully-interruptible Latches And Master-slave Flip-flops App 20150249442 - HSU; Steven K. ; et al.	2015-09-03
Method, Apparatus And System For A Source-synchronous Circuit-switched Network On A Chip (noc) App 20150220470 - Chen; Gregory K. ; et al.	2015-08-06
Using Dark Bits To Reduce Physical Unclonable Function (puf) Error Rate Without Storing Dark Bits Location App 20150178143 - Mathew; Sanu K. ; et al.	2015-06-25
Voltage level shift with interim-voltage-controlled contention interrupt Grant 9,059,715 - Hsu , et al. June 16, 2	2015-06-16
Apparatus and method for low power fully-interruptible latches and master-slave flip-flops Grant 9,035,686 - Hsu , et al. May 19, 2	2015-05-19
Apparatus And Method For Low Power Fully-interruptible Latches And Master-slave Flip-flops App 20150116019 - HSU; Steven K. ; et al.	2015-04-30
Architecture And Method For Hybrid Circuit-switched And Packet-switched Router App 20150071282 - Anders; Mark A. ; et al.	2015-03-12
Apparatus And Method For Skein Hashing App 20150023500 - Sheikh; Farhana ; et al.	2015-01-22
Hardware-embedded Key Based On Random Variations Of A Stress-hardened Inegrated Circuit App 20140266297 - Mathew; Sanu K. ; et al.	2014-09-18
Dual Composite Field Advanced Encryption Standard Memory Encryption Engine App 20140229741 - Mathew; Sanu K. ; et al.	2014-08-14
Variable Precision Floating Point Multiply-add Circuit App 20140188968 - KAUL; Himanshu ; et al.	2014-07-03
Motion Estimation for Video Processing App 20140105303 - Kaul; Himanshu ; et al.	2014-04-17
Single Instruction Multiple Data (simd) Reconfigurable Vector Register File And Permutation Unit App 20130339649 - HSU; Steven K. ; et al.	2013-12-19
Split path multiply accumulate unit Grant 8,577,948 - Srinivasan , et al. November 5, 2	2013-11-05
Voltage Level Shift With Interim-voltage-controlled Contention Interrupt App 20130271199 - Hsu; Steven K. ; et al.	2013-10-17
Combined set bit count and detector logic Grant 8,214,414 - Ramanarayanan , et al. July 3, 2	2012-07-03
Split Path Multiply Accumulate Unit App 20120072703 - SRINIVASAN; SURESH ; et al.	2012-03-22
On-the-fly Key Generation For Encryption And Decryption App 20110158403 - Mathew; Sanu K. ; et al.	2011-06-30
Method and apparatus for treating a signal Grant 7,913,101 - Kaul , et al. March 22, 2	2011-03-22
Wide voltage range level shifter with symmetrical switching Grant 7,855,575 - Hsu , et al. December 21, 2	2010-12-21
Distributed ring control circuits for Viterbi traceback Grant 7,840,885 - Anders , et al. November 23, 2	2010-11-23
Multiple voltage mode pre-charging and selective level shifting Grant 7,800,407 - Agarwal , et al. September 21, 2	2010-09-21
Combined Set Bit Count And Detector Logic App 20100082718 - Ramanarayanan; Rajaraman ; et al.	2010-04-01
Ultra low voltage and minimum operating voltage tolerant register file Grant 7,606,062 - Hsu , et al. October 20, 2	2009-10-20
Co-processor having configurable logic blocks Grant 7,592,835 - Agarwal , et al. September 22, 2	2009-09-22
Co-processor Having Configurable Logic Blocks App 20090167351 - Agarwal; Amit ; et al.	2009-07-02
Ultra low voltage and minimum operating voltage tolerant register file App 20090168483 - Hsu; Steven K. ; et al.	2009-07-02
Ultra wide voltage range register file circuit using programmable triple stacking App 20090168557 - Agarwal; Amit ; et al.	2009-07-02
Apparatus effecting interface between differing signal levels App 20090085637 - Hsu; Steven K. ; et al.	2009-04-02
Method and apparatus for treating a signal App 20090003428 - Kaul; Himanshu ; et al.	2009-01-01
Flop repeater circuit Grant 7,379,491 - Hsu , et al. May 27, 2	2008-05-27
Memory with spatially encoded data storage Grant 7,372,763 - Hsu , et al. May 13, 2	2008-05-13
Voltage-level converter Grant 7,352,209 - Hsu , et al. April 1, 2	2008-04-01
Distributed Ring Control Circuits For Viterbi Traceback App 20080072128 - Anders; Mark A. ; et al.	2008-03-20
Dynamic logic with adaptive keeper Grant 7,332,937 - Hsu , et al. February 19, 2	2008-02-19
Adder circuit with sense-amplifier multiplexer front-end Grant 7,325,024 - Mathew , et al. January 29, 2	2008-01-29
Viterbi traceback App 20070230606 - Anders; Mark A. ; et al.	2007-10-04
Distributed ring control circuits for Viterbi traceback Grant 7,275,204 - Anders , et al. September 25, 2	2007-09-25
Transition-encoder sense amplifier Grant 7,272,029 - Hsu , et al. September 18, 2	2007-09-18
Dynamic logic with adaptive keeper App 20070146013 - Hsu; Steven K. ; et al.	2007-06-28
Memory with spatially encoded data storage App 20070147158 - Hsu; Steven K. ; et al.	2007-06-28
Low leakage and leakage tolerant stack free multi-ported register file Grant 7,209,395 - Hsu , et al. April 24, 2	2007-04-24
High-performance adder Grant 7,188,134 - Mathew , et al. March 6, 2	2007-03-06
Hybrid CVSL pass-gate level-converting sequential circuit for multi-Vcc microprocessors Grant 7,132,856 - Hsu , et al. November 7, 2	2006-11-07
Multi read port bit line Grant 7,099,219 - Hsu , et al. August 29, 2	2006-08-29
Voltage-level converter App 20060186924 - Hsu; Steven K. ; et al.	2006-08-24
Transition-encoder sense amplifier App 20060140034 - Hsu; Steven K. ; et al.	2006-06-29
Multi Read Port Bit Line App 20060133183 - Hsu; Steven K. ; et al.	2006-06-22
Body biasing for dynamic circuit App 20060132187 - Tschanz; James W. ; et al.	2006-06-22
Low-power search line circuit encoding technique for content addressable memories Grant 7,057,913 - Hsu , et al. June 6, 2	2006-06-06
Distributed ring control circuits for viterbi traceback App 20060085730 - Anders; Mark A. ; et al.	2006-04-20
Low leakage and leakage tolerant stack free multi-ported register file App 20060067136 - Hsu; Steven K. ; et al.	2006-03-30
Hybrid CVSL pass-gate level-converting sequential circuit for multi-Vcc microprocessors App 20060044013 - Hsu; Steven K. ; et al.	2006-03-02
Hybrid pass gate level converting dual supply sequential circuit App 20050285624 - Hsu, Steven K. ; et al.	2005-12-29
Low-power search line circuit encoding technique for content addressable memories App 20050219887 - Hsu, Steven K. ; et al.	2005-10-06
Voltage-level converter Grant 6,919,737 - Alvandpour , et al. July 19, 2	2005-07-19
Flop repeater circuit App 20050141599 - Hsu, Steven K. ; et al.	2005-06-30
Adder circuit with sense-amplifier multiplexer front-end App 20050125481 - Mathew, Sanu K. ; et al.	2005-06-09
Fast dual-rail dynamic logic style Grant 6,838,910 - Alvandpour , et al. January 4, 2	2005-01-04
Clock receiver circuit for on-die salphasic clocking Grant 6,828,841 - Anders , et al. December 7, 2	2004-12-07
Conditional burn-in keeper for dynamic circuits Grant 6,791,364 - Alvandpour , et al. September 14, 2	2004-09-14
Low clock swing latch for dual-supply voltage design Grant 6,762,957 - Hsu , et al. July 13, 2	2004-07-13
Differential charge transfer sense amplifier Grant 6,751,141 - Alvandpour , et al. June 15, 2	2004-06-15
Differential Charge Transfer Sense Amplifier App 20040100844 - Alvandpour, Atila ; et al.	2004-05-27
Flash [II]-Domino: a fast dual-rail dynamic logic style Grant 6,717,441 - Alvandpour , et al. April 6, 2	2004-04-06
Static random access memory with symmetric leakage-compensated bit line Grant 6,707,708 - Alvandpour , et al. March 16, 2	2004-03-16
Static Random Access Memory With Symmetric Leakage-compensated Bit Line App 20040047176 - Alvandpour, Atila ; et al.	2004-03-11
Clock receiver circuit for on-die salphasic clocking App 20040036520 - Anders, Mark A. ; et al.	2004-02-26
Flash [II]-domino: a fast dual-rail dynamic logic style App 20040021486 - Alvandpour, Atila ; et al.	2004-02-05
Multi-phase Clock Generation And Synchronization App 20030201813 - Alvandpour, Atila ; et al.	2003-10-30
Multi-phase clock generation and synchronization Grant 6,633,190 - Alvandpour , et al. October 14, 2	2003-10-14
Full-swing source-follower leakage tolerant dynamic logic Grant 6,628,143 - Hsu , et al. September 30, 2	2003-09-30
Single ended interconnect systems Grant 6,617,892 - Krishnamurthy , et al. September 9, 2	2003-09-09
Clock receiver circuit for on-die salphasic clocking Grant 6,614,279 - Anders , et al. September 2, 2	2003-09-02
Current leakage reduction for loaded bit-lines in on-chip memory structures Grant 6,614,680 - Alvandpour , et al. September 2, 2	2003-09-02
Noise tolerant wide-fanin domino circuits Grant 6,600,340 - Krishnamurthy , et al. July 29, 2	2003-07-29
Low clock swing latch for dual-supply voltage design App 20030117933 - Hsu, Steven K. ; et al.	2003-06-26
Voltage-level converter App 20030107404 - Alvandpour, Atila ; et al.	2003-06-12
Noise-tolerant digital adder circuit and method Grant 6,571,269 - Krishnamurthy , et al. May 27, 2	2003-05-27
Level converting latch Grant 6,563,357 - Hsu , et al. May 13, 2	2003-05-13
Flash [II]-Domino: a fast dual-rail dynamic logic style App 20030076132 - Alvandpour, Atila ; et al.	2003-04-24
High-performance adder App 20030065700 - Mathew, Sanu K. ; et al.	2003-04-03
Full-swing source-follower leakage tolerant dynamic logic App 20030058000 - Hsu, Steven K. ; et al.	2003-03-27
Clock receiver circuit for on-die salphasic clocking App 20030042963 - Anders, Mark A. ; et al.	2003-03-06
Current Leakage Reduction For Loaded Bit-lines In On-chip Memory Structures App 20030002324 - Alvandpour, Atila ; et al.	2003-01-02
Current Leakage Reduction For Loaded Bit-lines In On-chip Memory Structures App 20030002322 - Alvandpour, Atila ; et al.	2003-01-02
Voltage-level converter App 20030001628 - Hsu, Steven K. ; et al.	2003-01-02
Conditional burn-in keeper for dynamic circuits App 20030001623 - Alvandpour, Atila ; et al.	2003-01-02
Current Leakage Reduction For Loaded Bit-lines In On-chip Memory Structures App 20030002327 - Alvandpour, Atila ; et al.	2003-01-02
Current leakage reduction for loaded bit-lines in on-chip memory structures App 20030002323 - Alvandpour, Atila ; et al.	2003-01-02
Current Leakage Reduction For Loaded Bit-lines In On-chip Memory Structures App 20030002325 - Alvandpour, Atila ; et al.	2003-01-02
Current leakage reduction for loaded bit-lines in on-chip memory structures App 20030002326 - Alvandpour, Atila ; et al.	2003-01-02
Boosted Multiplexer Transmission Gate App 20020084803 - Mathew, Sanu K. ; et al.	2002-07-04
Active leakage control technique for high performance dynamic circuits App 20020075038 - Mathew, Sanu K. ; et al.	2002-06-20
Noise tolerant wide-fanin domino circuits App 20020070758 - Krishnamurthy, Ram K. ; et al.	2002-06-13
Multiple power supply circuit architecture Grant 6,366,061 - Carley , et al. April 2, 2	2002-04-02
Single Ended Interconnect Systems App 20020008559 - KRISHNAMURTHY, RAM K. ; et al.	2002-01-24
Single ended domino compatible dual function generator circuits Grant 6,225,826 - Krishnamurthy , et al. May 1, 2	2001-05-01
Domino circuits with high performance and high noise immunity Grant 6,204,696 - Krishnamurthy , et al. March 20, 2	2001-03-20