loadpatents
name:-0.0078799724578857
name:-0.0088450908660889
name:-0.00059914588928223
Krick; Robert Patent Filings

Krick; Robert

Patent Applications and Registrations

Patent applications and USPTO patent grants for Krick; Robert.The latest application filed is for "storing non-temporal cache data".

Company Profile
0.10.8
  • Krick; Robert - Longmont CO
  • Krick; Robert - Fort Collins CO
  • Krick; Robert - Beaverton OR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
State encoding for cache lines
Grant 9,146,869 - Krick September 29, 2
2015-09-29
Method and apparatus including a probe filter for shared caches utilizing inclusion bits and a victim probe bit
Grant 9,058,269 - Krick , et al. June 16, 2
2015-06-16
Storing Non-temporal Cache Data
App 20150095586 - Walker; William L ;   et al.
2015-04-02
Method and apparatus for calculating error correction codes for selective data updates
Grant 8,924,817 - Krick December 30, 2
2014-12-30
Method for concurrent flush of L1 and L2 caches
Grant 8,751,745 - Krick , et al. June 10, 2
2014-06-10
State Encoding For Cache Lines
App 20140156931 - Krick; Robert
2014-06-05
Probe Filter For Shared Caches
App 20130346694 - KRICK; ROBERT ;   et al.
2013-12-26
Two Level Replacement Scheme Optimizes For Performance, Power, And Area
App 20120096226 - Thompson; Stephen P. ;   et al.
2012-04-19
Method And Apparatus For Dynamic Power Control Of Cache Memory
App 20120096295 - Krick; Robert
2012-04-19
Method And Apparatus For Calculating Error Correction Codes For Selective Data Updates
App 20120079350 - Krick; Robert
2012-03-29
Method For Concurrent Flush Of L1 And L2 Caches
App 20120042126 - KRICK; Robert ;   et al.
2012-02-16
LRU cache replacement for a partitioned set associative cache
Grant 7,856,633 - Lee , et al. December 21, 2
2010-12-21
Method and apparatus selectively to advance a write pointer for a queue based on the indicated validity or invalidity of an instruction stored within the queue
Grant 7,149,883 - Hammarlund , et al. December 12, 2
2006-12-12
System for loading PLL from bus fraction register when bus fraction register is in either first or second state and bus unit not busy
Grant 5,630,107 - Carmean , et al. May 13, 1
1997-05-13

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