Kresge; John S.
Patent Applications and Registrations
Patent applications and USPTO patent grants for Kresge; John S..The latest application filed is for "power core for use in circuitized substrate and method of making same".
Company Profile
0.27.16
- Kresge; John S. - Binghamton NY
Patent Activity
| Patent | Date |
|---|---|
| Method of making circuitized substrates having film resistors as part thereof Grant 8,240,027 - Egitto , et al. August 14, 2 | 2012-08-14 |
| Power Core For Use In Circuitized Substrate And Method Of Making Same App 20110284273 - Japp; Robert M. ; et al. | 2011-11-24 |
| Method of making a circuitized substrate with enhanced circuitry and electrical assembly utilizing said substrate Grant 7,595,454 - Kresge , et al. September 29, 2 | 2009-09-29 |
| Method of making circuitized substrates having film resistors as part thereof App 20090178271 - Egitto; Frank D. ; et al. | 2009-07-16 |
| Method of making a circuitized substrate with enhanced circuitry and electrical assembly utilizing said substrate App 20080098595 - Kresge; John S. ; et al. | 2008-05-01 |
| Method of making an electronic package Grant 7,024,764 - Kresge , et al. April 11, 2 | 2006-04-11 |
| Economical high density chip carrier Grant 6,998,290 - Adae-Amoakoh , et al. February 14, 2 | 2006-02-14 |
| Material separation to form segmented product Grant 6,958,106 - Antesberger , et al. October 25, 2 | 2005-10-25 |
| Material separation to form segmented product App 20050224167 - Antesberger, Timothy E. ; et al. | 2005-10-13 |
| Integrated circuit structure Grant 6,887,779 - Alcoe , et al. May 3, 2 | 2005-05-03 |
| Method for forming an electrical structure Grant 6,868,604 - Kresge , et al. March 22, 2 | 2005-03-22 |
| Method of making a multi-layered interconnect structure Grant 6,829,823 - Downes, Jr. , et al. December 14, 2 | 2004-12-14 |
| Material separation to form segmented product App 20040201136 - Antesberger, Timothy E. ; et al. | 2004-10-14 |
| Economical high density chip carrier Grant 6,753,612 - Adae-Amoakoh , et al. June 22, 2 | 2004-06-22 |
| Integrated circuit structure App 20040099939 - Alcoe, David J. ; et al. | 2004-05-27 |
| Economical high density chip carrier App 20040099960 - Adae-Amoakoh, Sylvia ; et al. | 2004-05-27 |
| Integrated circuit structure Grant 6,720,502 - Alcoe , et al. April 13, 2 | 2004-04-13 |
| Formation of a metallic interlocking structure Grant 6,693,031 - Advocate, Jr. , et al. February 17, 2 | 2004-02-17 |
| Laser ablatable material and its use Grant 6,689,543 - Kresge , et al. February 10, 2 | 2004-02-10 |
| Strain relief for substrates having a low coefficient of thermal expansion App 20030101581 - Kresge, John S. ; et al. | 2003-06-05 |
| Laser excision of laminate chip carriers Grant 6,509,546 - Egitto , et al. January 21, 2 | 2003-01-21 |
| Laser beam system for micro via formation Grant 6,483,074 - Kresge November 19, 2 | 2002-11-19 |
| Circuit board construction App 20020166697 - Janecek, Mark L. ; et al. | 2002-11-14 |
| Method and structure for economical high density chip carrier App 20020145203 - Adae-Amoakoh, Sylvia ; et al. | 2002-10-10 |
| Laser Beam System For Micro Via Formation App 20020125221 - Kresge, John S. | 2002-09-12 |
| Laser ablatable material and its use App 20020094491 - Kresge, John S. ; et al. | 2002-07-18 |
| Electronic package with high density interconnect layer App 20020085364 - Downes, Francis J. JR. ; et al. | 2002-07-04 |
| Electronic package for electronic components and method of making same App 20020059723 - Kresge, John S. ; et al. | 2002-05-23 |
| Formation of a metallic interlocking structure App 20020056890 - Advocate, Gerald G. JR. ; et al. | 2002-05-16 |
| Electronic package with high density interconnect layer Grant 6,373,717 - Downes, Jr. , et al. April 16, 2 | 2002-04-16 |
| Metallic interlocking structure Grant 6,348,737 - Advocate, Jr. , et al. February 19, 2 | 2002-02-19 |
| Stress relieved ball grid array package Grant 6,341,071 - Johnson , et al. January 22, 2 | 2002-01-22 |
| Tented plated through-holes and method for fabrication thereof App 20010022392 - Kresge, John S. ; et al. | 2001-09-20 |
| Method of forming a via in a substrate Grant 6,203,652 - Egitto , et al. March 20, 2 | 2001-03-20 |
| Semiconductor structure interconnector and assembly Grant 6,059,579 - Kresge , et al. May 9, 2 | 2000-05-09 |
| Method and apparatus for flexibly connecting electronic devices Grant 5,956,235 - Kresge , et al. September 21, 1 | 1999-09-21 |
| Thermal stress relieving substrate Grant 5,874,776 - Kresge , et al. February 23, 1 | 1999-02-23 |
| Method of fabricating a flex laminate package Grant 5,620,782 - Davis , et al. April 15, 1 | 1997-04-15 |
| Laminated electronic package including a power/ground assembly Grant 5,574,630 - Kresge , et al. November 12, 1 | 1996-11-12 |
| Method of fabricating a flex laminate package Grant 5,509,196 - Davis , et al. April 23, 1 | 1996-04-23 |
| Flex laminate package for a parallel processor Grant 5,384,690 - Davis , et al. January 24, 1 | 1995-01-24 |
| Parallel processor and method of fabrication Grant 5,347,710 - Gall , et al. September 20, 1 | 1994-09-20 |
| Monte carlo simulation design methodology Grant 5,301,118 - Heck , et al. April 5, 1 | 1994-04-05 |
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