| Patent | Date |
|---|
Test circuit for testing a synchronous memory circuit
Grant 7,117,404 - Ernst , et al. October 3, 2 | 2006-10-03 |
Method and device for generating digital signal patterns
Grant 7,117,403 - Ernst , et al. October 3, 2 | 2006-10-03 |
System for testing fast synchronous digital circuits, particularly semiconductor memory chips
Grant 7,062,690 - Ernst , et al. June 13, 2 | 2006-06-13 |
DDR to SDR conversion that decodes read and write accesses and forwards delayed commands to first and second memory modules
Grant 6,971,039 - Krause , et al. November 29, 2 | 2005-11-29 |
Address generator for generating addresses for testing a circuit
Grant 6,957,373 - Ernst , et al. October 18, 2 | 2005-10-18 |
Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested
Grant 6,871,306 - Ernst , et al. March 22, 2 | 2005-03-22 |
Test data generator
Grant 6,865,707 - Ernst , et al. March 8, 2 | 2005-03-08 |
Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices
Grant 6,862,702 - Ernst , et al. March 1, 2 | 2005-03-01 |
Method and probe card configuration for testing a plurality of integrated circuits in parallel
Grant 6,853,206 - Hubner , et al. February 8, 2 | 2005-02-08 |
Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits
Grant 6,839,397 - Ernst , et al. January 4, 2 | 2005-01-04 |
Method and device for offset-voltage free voltage measurement and adjustment of a reference voltage source of an integrated semiconductor circuit
Grant 6,812,689 - Krause , et al. November 2, 2 | 2004-11-02 |
Selectively deactivating a first control loop in a dual control loop circuit during data transmission
Grant 6,779,124 - Hohler , et al. August 17, 2 | 2004-08-17 |
Test configuration and test method for testing a plurality of integrated circuits in parallel
Grant 6,762,611 - Hubner , et al. July 13, 2 | 2004-07-13 |
Method and probe card configuration for testing a plurality of integrated circuits in parallel
App 20040124863 - Hubner, Michael ; et al. | 2004-07-01 |
Device and method for calibrating the pulse duration of a signal source
Grant 6,756,699 - Hartmann , et al. June 29, 2 | 2004-06-29 |
Test circuit
Grant 6,744,272 - Ernst , et al. June 1, 2 | 2004-06-01 |
Method for on-chip testing of memory cells of an integrated memory circuit
Grant 6,728,147 - Beer , et al. April 27, 2 | 2004-04-27 |
System for testing fast integrated digital circuits, in particular semiconductor memory modules
Grant 6,721,904 - Ernst , et al. April 13, 2 | 2004-04-13 |
Test circuit for testing a circuit
Grant 6,618,305 - Ernst , et al. September 9, 2 | 2003-09-09 |
Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature measuring configuration
Grant 6,612,738 - Beer , et al. September 2, 2 | 2003-09-02 |
System for testing fast synchronous semiconductor circuits
Grant 6,556,492 - Ernst , et al. April 29, 2 | 2003-04-29 |
Method for on-chip testing of memory cells of an integrated memory circuit
App 20030021169 - Beer, Peter ; et al. | 2003-01-30 |
Device and method for calibrating the pulse duration of a signal source
App 20030016064 - Hartmann, Udo ; et al. | 2003-01-23 |
Test circuit for testing a synchronous circuit
App 20030005389 - Ernst, Wolfgang ; et al. | 2003-01-02 |
Test circuit for testing a synchronous memory circuit
App 20030005361 - Ernst, Wolfgang ; et al. | 2003-01-02 |
Test circuit for testing a circuit
App 20020196688 - Ernst, Wolfgang ; et al. | 2002-12-26 |
Test circuit
App 20020171447 - Ernst, Wolfgang ; et al. | 2002-11-21 |
Method and device for reading and for checking the time position of data response signals read out from a memory module to be tested
App 20020160558 - Ernst, Wolfgang ; et al. | 2002-10-31 |
Test data generator
App 20020157052 - Ernst, Wolfgang ; et al. | 2002-10-24 |
Memory configuration
App 20020134994 - Krause, Gunnar ; et al. | 2002-09-26 |
Test configuration and test method for testing a plurality of integrated circuits in parallel
App 20020089341 - Hubner, Michael ; et al. | 2002-07-11 |
System for testing fast synchronous digital circuits, particularly semiconductor memory chips
App 20020070748 - Ernst, Wolfgang ; et al. | 2002-06-13 |
System for testing fast synchronous semiconductor circuits
App 20020012283 - Ernst, Wolfgang ; et al. | 2002-01-31 |
Address counter for addressing synchronous high-frequency digital circuits, in particular memory devices
App 20020012286 - Ernst, Wolfgang ; et al. | 2002-01-31 |
Method and device for generating digital signal patterns
App 20020009007 - Ernst, Wolfgang ; et al. | 2002-01-24 |
System for testing fast integrated digital circuits, in particular semiconductor memory modules
App 20020010877 - Ernst, Wolfgang ; et al. | 2002-01-24 |
Circuit configuration for generating control signals for testing high-frequency synchronous digital circuits
App 20020010878 - Ernst, Wolfgang ; et al. | 2002-01-24 |
Method and device for offset-voltage free voltage measurement and adjustment of a reference voltage source of an integrated semiconductor circuit
App 20020000828 - Krause, Gunnar ; et al. | 2002-01-03 |
Address generator for generating addresses for an on-chip trim circuit
App 20010054127 - Krause, Gunnar ; et al. | 2001-12-20 |
Digital memory circuit
App 20010046166 - Fischer, Helmut ; et al. | 2001-11-29 |
Method for determining the temperature of a semiconductor chip and semiconductor chip with temperature measuring configuration
App 20010026576 - Beer, Peter ; et al. | 2001-10-04 |
Synchronous circuit
App 20010025350 - Hohler, Rainer ; et al. | 2001-09-27 |
Circuit configuration having a variable number of data outputs and device for reading out data from the circuit configuration with the variable number of data outputs
App 20010017809 - Krause, Gunnar | 2001-08-30 |
Method of programming a semiconductor memory
App 20010000758 - Gobel, Holger ; et al. | 2001-05-03 |
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