Koyfman; Anatoly

Patent Applications and Registrations

Patent applications and USPTO patent grants for Koyfman; Anatoly.The latest application filed is for "diminution of test templates in test suites".

Company Profile

1.11.13

Koyfman; Anatoly - Kiriat Yam IL
Koyfman; Anatoly - Haifa IL
Koyfman; Anatoly - Kiryat Yam IL

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Diminution of test templates in test suites Grant 11,023,366 - Ackerman , et al. June 1, 2	2021-06-01
Diminution Of Test Templates In Test Suites App 20210124676 - Ackerman; Samuel Solomon ; et al.	2021-04-29
Address translation stimuli generation for post-silicon functional validation Grant 10,026,500 - Doron , et al. July 17, 2	2018-07-17
Address Translation Stimuli Generation For Post-silicon Functional Validation App 20170140839 - Doron; Shai ; et al.	2017-05-18
Circuit Modification App 20170132346 - IBRAHEEM; WESAM ; et al.	2017-05-11
Circuit modification Grant 9,633,155 - Ibraheem , et al. April 25, 2	2017-04-25
Mutations on input for test generation Grant 8,938,646 - Fournier , et al. January 20, 2	2015-01-20
Method and apparatus for post-silicon testing Grant 8,892,386 - Adir , et al. November 18, 2	2014-11-18
Mutations on input for test generation App 20140115396 - Fournier; Laurent ; et al.	2014-04-24
Partial Instruction-by-instruction checking on acceleration platforms App 20140019929 - Raviv; Gal ; et al.	2014-01-16
Instruction-by-instruction checking on acceleration platforms Grant 8,601,418 - Chatterjee , et al. December 3, 2	2013-12-03
Instruction-by-instruction Checking On Acceleration Platforms App 20130311962 - Chatterjee; Debapriya ; et al.	2013-11-21
Method And Apparatus For Post-silicon Testing App 20130013246 - Adir; Allon ; et al.	2013-01-10
Method of verification of address translation mechanisms Grant 8,245,164 - Katz , et al. August 14, 2	2012-08-14
Verification Of Speculative Execution App 20120131386 - Fournier; Lurent ; et al.	2012-05-24
Method of Verification of Address Translation Mechanisms App 20090319961 - Katz; Yoav Avraham ; et al.	2009-12-24
Device, System and Method of Verification of Address Translation Mechanisms App 20080209160 - Katz; Yoav Avraham ; et al.	2008-08-28
Modeling language and method for address translation design mechanisms in test generation Grant 7,370,296 - Koyfman , et al. May 6, 2	2008-05-06
Generation of mask-constrained floating-point addition and subtraction test cases, and method and system therefor Grant 7,028,067 - Abraham , et al. April 11, 2	2006-04-11
Modeling language and method for address translation design mechanisms in test generation App 20050278702 - Koyfman, Anatoly ; et al.	2005-12-15
Generation of mask-constrained floating-point addition and substraction test cases, and method and system therefor App 20030200244 - Abraham, Ziv ; et al.	2003-10-23

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