loadpatents
name:-0.020179033279419
name:-0.022442102432251
name:-0.00048613548278809
Koyanagi; Yoichi Patent Filings

Koyanagi; Yoichi

Patent Applications and Registrations

Patent applications and USPTO patent grants for Koyanagi; Yoichi.The latest application filed is for "automating solving np problems in annealer systems".

Company Profile
0.23.15
  • Koyanagi; Yoichi - Sunnyvale CA
  • Koyanagi; Yoichi - Yokohama JP
  • Koyanagi; Yoichi - Kawasaki N/A JP
  • Koyanagi; Yoichi - Cupertino CA
  • Koyanagi; Yoichi - Saratoga CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Automating solving NP problems in annealer systems
Grant 11,132,422 - Chen , et al. September 28, 2
2021-09-28
Automating Solving Np Problems In Annealer Systems
App 20200401650 - Chen; Wei-Peng ;   et al.
2020-12-24
Transmitting circuit, communication system, and communication method
Grant 9,813,188 - Ogata , et al. November 7, 2
2017-11-07
Timing control circuit
Grant 9,684,332 - Ogata , et al. June 20, 2
2017-06-20
Transmission circuit, communication system and transmission method
Grant 9,160,380 - Koyanagi October 13, 2
2015-10-13
Receiving circuit
Grant 9,049,059 - Nakao , et al. June 2, 2
2015-06-02
Transmitting Circuit, Communication System, And Communication Method
App 20150029876 - OGATA; Yuuki ;   et al.
2015-01-29
Receiving Circuit
App 20140362899 - NAKAO; Takanori ;   et al.
2014-12-11
Timing Control Circuit
App 20140325253 - OGATA; Yuuki ;   et al.
2014-10-30
Latch circuit, flip-flop circuit, and divider
Grant 8,836,369 - Ogata , et al. September 16, 2
2014-09-16
Data receiver circuit
Grant 8,750,430 - Koyanagi June 10, 2
2014-06-10
Parallel-to-serial conversion circuit, information processing apparatus, information processing system, and parallel-to-serial conversion method
Grant 8,593,313 - Koyanagi November 26, 2
2013-11-26
Transmission Circuit, Communication System And Transmission Method
App 20130195125 - KOYANAGI; Yoichi
2013-08-01
Latch Circuit, Flip-flop Circuit, And Divider
App 20130088260 - Ogata; Yuuki ;   et al.
2013-04-11
Parallel-to-serial Conversion Circuit, Information Processing Apparatus, Information Processing System, And Parallel-to-serial Conversion Method
App 20120313799 - KOYANAGI; Yoichi
2012-12-13
Data transmitting circuit and method
Grant 8,102,288 - Koyanagi January 24, 2
2012-01-24
Data Receiver Circuit
App 20110249775 - Koyanagi; Yoichi
2011-10-13
Data Transmitting Circuit And Method
App 20100328118 - KOYANAGI; Yoichi
2010-12-30
System and method for equalizing high-speed data transmission
Grant 7,561,616 - Koyanagi July 14, 2
2009-07-14
Equalizing a signal for transmission
Grant 7,512,178 - Koyanagi , et al. March 31, 2
2009-03-31
Low-voltage differential signal driver for high-speed digital transmission
Grant 7,427,878 - Jiang , et al. September 23, 2
2008-09-23
Low-voltage Differential Signal Driver For High-speed Digital Transmission
App 20070279098 - Jiang; Jian Hong ;   et al.
2007-12-06
Equalizing a Signal for Transmission
App 20070110147 - Koyanagi; Yoichi ;   et al.
2007-05-17
Equalizing a signal for transmission
Grant 7,173,965 - Koyanagi , et al. February 6, 2
2007-02-06
System and method for equalizing high-speed data transmission
Grant 7,065,135 - Koyanagi June 20, 2
2006-06-20
System and method for equalizing high-speed data transmission
App 20050281097 - Koyanagi, Yoichi
2005-12-22
System and method for equalizing high-speed data transmission
App 20050271134 - Koyanagi, Yoichi
2005-12-08
System and method for automatic deskew across a high speed, parallel interconnection
Grant 6,898,742 - Koyanagi , et al. May 24, 2
2005-05-24
Equalizing a signal for transmission
App 20040151239 - Koyanagi, Yoichi ;   et al.
2004-08-05
System and method for automatic deskew across a high speed, parallel interconnection
Grant 6,636,993 - Koyanagi , et al. October 21, 2
2003-10-21
System and method for automatic deskew across a high speed, parallel interconnection
App 20030074609 - Koyanagi, Yoichi ;   et al.
2003-04-17
Parallel computer which verifies direct data transmission between local memories with a send complete flag
Grant 6,115,803 - Hayashi , et al. September 5, 2
2000-09-05
Queue control apparatus including memory to save data received when capacity of queue is less than a predetermined threshold
Grant 5,892,979 - Shiraki , et al. April 6, 1
1999-04-06
Storage apparatus having a nonvolatile storage device capable of retaining data after an incomplete write operation and method of accessing same
Grant 5,818,755 - Koyanagi , et al. October 6, 1
1998-10-06
Control system for access between processing elements in a parallel computer
Grant 5,742,843 - Koyanagi , et al. April 21, 1
1998-04-21
Vector processor having a mask register used for performing nested conditional instructions
Grant 5,604,913 - Koyanagi , et al. February 18, 1
1997-02-18

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed