Kowshik; Vikram

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kowshik; Vikram.The latest application filed is for "method for analog in-memory compute for neural networks".

Company Profile

2.16.8

Kowshik; Vikram - Cupertino CA US
Kowshik; Vikram - San Jose CA
Kowshik; Vikram - Fremont CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method For Analog In-memory Compute For Neural Networks App 20210264243 - Sarin; Vishal ; et al.	2021-08-26
Temperature Compensated Common Counter Adc Method For Neural Compute App 20210143828 - Sarin; Vishal ; et al.	2021-05-13
Methods And Systems Of Cell-array Programming For Neural Compute Using Flash Arrays App 20210043264 - Sarin; Vishal ; et al.	2021-02-11
Method and apparatus of a smart decoding scheme for fast synchronous read in a memory system Grant 7,143,257 - Kowshik , et al. November 28, 2	2006-11-28
Functional register decoding system for multiple plane operation Grant 7,099,226 - Yuan , et al. August 29, 2	2006-08-29
Functional register decoding system for multiple plane operation App 20050099857 - Yuan, Yolanda ; et al.	2005-05-12
Method and apparatus of a smart decoding scheme for fast synchronous read in a memory system App 20050081011 - Kowshik, Vikram ; et al.	2005-04-14
Charge pump Grant 5,907,484 - Kowshik , et al. May 25, 1	1999-05-25
Integrated program verify page buffer Grant 5,903,497 - Yu , et al. May 11, 1	1999-05-11
Sensing scheme for non-volatile memories Grant 5,798,967 - Sarin , et al. August 25, 1	1998-08-25
Row decoder circuit for PMOS non-volatile memory cell which uses electron tunneling for programming and erasing Grant 5,796,656 - Kowshik , et al. August 18, 1	1998-08-18
PMOS non-volatile latch for storage of redundancy addresses Grant 5,781,471 - Kowshik , et al. July 14, 1	1998-07-14
Row decoder circuit for PMOS non-volatile memory cell which uses channel hot electrons for programming Grant 5,777,926 - Trinh , et al. July 7, 1	1998-07-07
Switching circuit for controlled transition between high program and erase voltages and a power supply voltage for memory cells Grant 5,774,406 - Kowshik June 30, 1	1998-06-30
Programming pulse ramp control circuit Grant 5,687,116 - Kowshik , et al. November 11, 1	1997-11-11
Charge pump Grant 5,625,544 - Kowshik , et al. April 29, 1	1997-04-29
Two-transistor electrically-alterable switch employing hot electron injection and fowler nordheim tunneling Grant 5,625,211 - Kowshik April 29, 1	1997-04-29
Two-transistor zero-power electrically-alterable non-volatile latch Grant 5,587,603 - Kowshik December 24, 1	1996-12-24
Programmable memory data protection scheme Grant 4,975,878 - Boddu , et al. December 4, 1	1990-12-04
Sequential read access of serial memories with a user defined starting address Grant 4,873,671 - Kowshik , et al. October 10, 1	1989-10-10
Zero power, electrically alterable, nonvolatile latch Grant 4,858,185 - Kowshik , et al. August 15, 1	1989-08-15

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