loadpatents
name:-0.01304292678833
name:-0.012881994247437
name:-0.0030210018157959
Koo; Ja Beom Patent Filings

Koo; Ja Beom

Patent Applications and Registrations

Patent applications and USPTO patent grants for Koo; Ja Beom.The latest application filed is for "view mode change device using touch pattern input and method therefor".

Company Profile
2.11.13
  • Koo; Ja Beom - Gyeonggi-do KR
  • KOO; Ja Beom - Seoul KR
  • Koo; Ja Beom - Icheon-si KR
  • KOO; Ja Beom - Icheon-si Gyeonggi-do KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor memory device having plurality of address storing circuits for storing sampling address as latch addresses and a duplication decision circuit, and method of refreshing operation
Grant 11,373,697 - Lim , et al. June 28, 2
2022-06-28
View Mode Change Device Using Touch Pattern Input And Method Therefor
App 20220197487 - KOO; Ja Beom
2022-06-23
Semiconductor Memory Device Including Address Generation Circuit And Operating Method Thereof
App 20210375346 - LIM; Jung Ho ;   et al.
2021-12-02
Memory apparatus relating to determination of a failed region and test method thereof, memory module and system using the same
Grant 10,976,368 - Koo April 13, 2
2021-04-13
Semiconductor device with array configuration including upper segment, lower segment classified according to refresh units, repair controllers for controlling repair operation of upper segment and lower segment
Grant 10,734,062 - Koo , et al.
2020-08-04
Semiconductor Device
App 20190385661 - KOO; Ja Beom ;   et al.
2019-12-19
Memory Apparatus Relating To Determination Of A Failed Region And Test Method Thereof, Memory Module And System Using The Same
App 20190242944 - KOO; Ja Beom
2019-08-08
Memory apparatus relating to determination of a failed region and test method thereof, memory module and system using the same
Grant 10,302,701 - Koo
2019-05-28
Memory Apparatus Relating To Determination Of A Failed Region And Test Method Thereof, Memory Module And System Using The Same
App 20180218777 - KOO; Ja Beom
2018-08-02
Integrated circuit and memory device performing boot-up operation
Grant 9,934,875 - Koo , et al. April 3, 2
2018-04-03
Integrated Circuit And Memory Device
App 20170186501 - KOO; Ja-Beom ;   et al.
2017-06-29
Semiconductor apparatus
Grant 9,543,951 - Koo , et al. January 10, 2
2017-01-10
Semiconductor Apparatus
App 20160308532 - KOO; Ja Beom ;   et al.
2016-10-20
Latch circuit and flip-flop circuit including the same
Grant 8,810,295 - Koo , et al. August 19, 2
2014-08-19
Latch Circuit And Flip-flop Circuit Including The Same
App 20130307595 - KOO; Ja-Beom ;   et al.
2013-11-21
Duty cycle correction circuit and delay locked loop circuit including the same
Grant 8,581,650 - Kim , et al. November 12, 2
2013-11-12
Duty Cycle Correction Circuit And Delay Locked Loop Circuit Including The Same
App 20130154702 - KIM; Ki Han ;   et al.
2013-06-20
Integrated circuit and method for controlling data output impedance
Grant 8,237,464 - Koo , et al. August 7, 2
2012-08-07
Integrated Circuit And Method For Controlling Data Output Impedance
App 20120007631 - KOO; Ja Beom ;   et al.
2012-01-12
Semiconductor device
Grant 7,986,177 - Koo , et al. July 26, 2
2011-07-26
Semiconductor Device
App 20100164573 - Koo; Ja-Beom ;   et al.
2010-07-01

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