Komaki; Masaki

Patent Applications and Registrations

Patent applications and USPTO patent grants for Komaki; Masaki.The latest application filed is for "semiconductor device and method for layouting semiconductor device".

Company Profile

0.10.12

Komaki; Masaki - Kasugai JP
Komaki, Masaki - Kasugai-shi JP

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Power switch circuit and semiconductor integrated circuit device Grant 8,258,829 - Komaki September 4, 2	2012-09-04
Semiconductor device with transistors having substantial the same characteristic variations Grant 8,072,243 - Nishiwaki , et al. December 6, 2	2011-12-06
Semiconductor Device And Method For Layouting Semiconductor Device App 20100213979 - Nishiwaki; Akifumi ; et al.	2010-08-26
Power Switch Circuit And Semiconductor Integrated Circuit Device App 20100001782 - KOMAKI; Masaki	2010-01-07
Fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus Grant 7,521,349 - Komaki April 21, 2	2009-04-21
Decoupling capacitor for semiconductor integrated circuit device Grant 7,508,696 - Komaki March 24, 2	2009-03-24
Master-slave Circuit And Control Method Of The Same App 20090058486 - OZAWA; Tadashi ; et al.	2009-03-05
Unit cell of semiconductor integrated circuit and wiring method and wiring program using unit cell Grant 7,500,211 - Komaki March 3, 2	2009-03-03
Pattern layout and layout data generation method Grant 7,493,582 - Komaki February 17, 2	2009-02-17
Decoupling capacitor for semiconductor integrated circuit device App 20070230087 - Komaki; Masaki	2007-10-04
Unit cell of semiconductor integrated circuit and wiring method and wiring program using unit cell App 20070228419 - Komaki; Masaki	2007-10-04
Selector circuit and semiconductor device Grant 7,256,620 - Komaki August 14, 2	2007-08-14
Pattern layout and layout data generation method App 20070096158 - Komaki; Masaki	2007-05-03
Method of designing layout of semiconductor device Grant 6,996,794 - Komaki February 7, 2	2006-02-07
Selector circuit and semiconductor device App 20050166107 - Komaki, Masaki	2005-07-28
Fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus App 20040222442 - Komaki, Masaki	2004-11-11
Scan flip-flop circuit, scan flip-flop circuit array, and integrated circuit device Grant 6,794,898 - Komaki September 21, 2	2004-09-21
Fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus Grant 6,774,412 - Komaki August 10, 2	2004-08-10
Scan flip-flop circuit, scan flip-flop circuit array, and integrated circuit device App 20030222677 - Komaki, Masaki	2003-12-04
Method of designing layout of semiconductor device App 20030135835 - Komaki, Masaki	2003-07-17
Fundamental cell, semiconductor integrated circuit device, wiring method and wiring apparatus App 20020140001 - Komaki, Masaki	2002-10-03
Method of designing layout of semiconductor device App 20010056569 - Komaki, Masaki	2001-12-27

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.