Kolodny; Avinoam
Patent Applications and Registrations
Patent applications and USPTO patent grants for Kolodny; Avinoam.The latest application filed is for "memristor based multithreading".
- Kolodny; Avinoam - Haifa IL
- Kolodny; Avinoam - Cupertino CA
| Patent | Date |
|---|---|
| Memristor Based Multithreading App 20200192675 - Kolodny; Avinoam ; et al. | 2020-06-18 |
| Memristor based multithreading Grant 10,521,237 - Kolodny , et al. Dec | 2019-12-31 |
| Analog multiplier using a memristive device and method for implemening Hebbian learning rules using memrisor arrays Grant 9,754,203 - Di Castro , et al. September 5, 2 | 2017-09-05 |
| Multistate register having a flip flop and multiple memristive devices Grant 9,659,650 - Kolodny , et al. May 23, 2 | 2017-05-23 |
| Memristive Akers Logic Array App 20170019108 - Kvatinsky; Shahar ; et al. | 2017-01-19 |
| Memristive akers logic array Grant 9,548,741 - Kvatinsky , et al. January 17, 2 | 2017-01-17 |
| Multistate Register Having A Flip Flop And Multiple Memristive Devices App 20170011797 - Kolodny; Avinoam ; et al. | 2017-01-12 |
| Memristor Based Multithreading App 20140325192 - Kolodny; Avinoam ; et al. | 2014-10-30 |
| Analog Multiplier Using A Memristive Device And Method For Implemening Hebbian Learning Rules Using Memrisor Arrays App 20140289179 - Di Castro; Dotan ; et al. | 2014-09-25 |
| Logic circuit delay optimization Grant 8,225,265 - Morgenshtein , et al. July 17, 2 | 2012-07-17 |
| Bus Enhanced Network On Chip App 20110022754 - Cidon; Israel ; et al. | 2011-01-27 |
| Logic circuit delay optimization App 20090150847 - Morgenshtein; Arkadiy ; et al. | 2009-06-11 |
| Clock tuning circuit in chip design App 20020073389 - Elboim, Yaron ; et al. | 2002-06-13 |
| Programmable complementary transistors Grant 4,785,199 - Kolodny , et al. * November 15, 1 | 1988-11-15 |
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