loadpatents
name:-0.0039920806884766
name:-0.0037088394165039
name:-0.0010871887207031
Kolluri; Seshadri Patent Filings

Kolluri; Seshadri

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kolluri; Seshadri.The latest application filed is for "gan transistors with polysilicon layers used for creating additional components".

Company Profile
1.9.9
  • Kolluri; Seshadri - San Jose CA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
GaN transistors with polysilicon layers used for creating additional components
Grant 10,312,260 - Cao , et al.
2019-06-04
Flip chip interconnection with reduced current density
Grant 10,090,274 - Strittmatter , et al. October 2, 2
2018-10-02
GaN transistors with polysilicon layers used for creating additional components
Grant 9,837,438 - Cao , et al. December 5, 2
2017-12-05
GaN TRANSISTORS WITH POLYSILICON LAYERS USED FOR CREATING ADDITIONAL COMPONENTS
App 20170330898 - Cao; Jianjun ;   et al.
2017-11-16
Integrated circuit with matching threshold voltages and method for making same
Grant 9,583,480 - Cao , et al. February 28, 2
2017-02-28
GaN device with reduced output capacitance and process for making same
Grant 9,331,191 - Colino , et al. May 3, 2
2016-05-03
Integrated Circuit With Matching Threshold Voltages And Method For Making Same
App 20160111416 - Cao; Jianjun ;   et al.
2016-04-21
Gan Transistors With Polysilicon Layers Used For Creating Additional Components
App 20160086980 - Cao; Jianjun ;   et al.
2016-03-24
GaN transistors with polysilicon layers for creating additional components
Grant 9,214,461 - Cao , et al. December 15, 2
2015-12-15
Integrated circuit with matching threshold voltages and method for making same
Grant 9,214,399 - Cao , et al. December 15, 2
2015-12-15
Method to fabricate self-aligned isolation in gallium nitride devices and integrated circuits
Grant 9,214,528 - Zhou , et al. December 15, 2
2015-12-15
Isolation structure in gallium nitride devices and integrated circuits
Grant 9,171,911 - Zhou , et al. October 27, 2
2015-10-27
Flip Chip Interconnection With Reduced Current Density
App 20150270241 - STRITTMATTER; ROBERT ;   et al.
2015-09-24
Integrated Circuit With Matching Threshold Voltages And Method For Making Same
App 20150034962 - Cao; Jianjun ;   et al.
2015-02-05
GaN TRANSISTORS WITH POLYSILICON LAYERS FOR CREATING ADDITIONAL COMPONENTS
App 20150028384 - Cao; Jianjun ;   et al.
2015-01-29
GaN DEVICE WITH REDUCED OUTPUT CAPACITANCE AND PROCESS FOR MAKING SAME
App 20150028390 - Colino; Stephen L. ;   et al.
2015-01-29
Isolation Structure In Gallium Nitride Devices And Integrated Circuits
App 20150008442 - Zhou; Chunhua ;   et al.
2015-01-08
Method To Fabricate Self-aligned Isolation In Gallium Nitride Devices And Integrated Circuits
App 20150011057 - Zhou; Chunhua ;   et al.
2015-01-08

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