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name:-0.027534008026123
name:-0.014588117599487
name:-0.00050687789916992
Kohli; Puneet Patent Filings

Kohli; Puneet

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kohli; Puneet.The latest application filed is for "sram cell parameter optimization".

Company Profile
0.14.20
  • Kohli; Puneet - Oakland CA US
  • Kohli; Puneet - Dallas TX
  • Kohli; Puneet - Austin TX
  • Kohli, Puneet - Arlington TX
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
SRAM cell parameter optimization
Grant 9,059,032 - Houston , et al. June 16, 2
2015-06-16
Sram Cell Parameter Optimization
App 20120275207 - Houston; Theodore W. ;   et al.
2012-11-01
Bipolar transistors with resistors
Grant 8,217,426 - Kohli July 10, 2
2012-07-10
Multiple indium implant methods and devices and integrated circuits therefrom
Grant 7,960,238 - Kohli , et al. June 14, 2
2011-06-14
Semiconductor doping with reduced gate edge diode leakage
Grant 7,897,496 - Kohli , et al. March 1, 2
2011-03-01
Use of poly resistor implant to dope poly gates
Grant 7,846,783 - Mehrotra , et al. December 7, 2
2010-12-07
Bipolar Transistors With Resistors
App 20100178740 - Kohli; Puneet
2010-07-15
Multiple Indium Implant Methods And Devices And Integrated Circuits Therefrom
App 20100164003 - KOHLI; PUNEET ;   et al.
2010-07-01
Formation of fully silicided gate with oxide barrier on the source/drain silicide regions
Grant 7,737,015 - Kohli , et al. June 15, 2
2010-06-15
High threshold NMOS source-drain formation with As, P and C to reduce damage
Grant 7,736,983 - Kohli , et al. June 15, 2
2010-06-15
Use of Poly Resistor Implant to Dope Poly Gates
App 20100112764 - Mehrotra; Manoj ;   et al.
2010-05-06
Multiple Spacer And Carbon Implant Comprising Process And Semiconductor Devices Therefrom
App 20100084712 - Kohli; Puneet
2010-04-08
Semiconductor device manufactured using a laminated stress layer
Grant 7,611,939 - Mehrotra , et al. November 3, 2
2009-11-03
Highly Conductive Shallow Junction Formation
App 20090224319 - Kohli; Puneet
2009-09-10
HIGH THRESHOLD NMOS SOURCE-DRAIN FORMATION WITH As, P AND C TO REDUCE DAMAGE
App 20090179280 - Kohli; Puneet ;   et al.
2009-07-16
Semiconductive device fabricated using a raised layer to silicide the gate
Grant 7,560,379 - Kohli , et al. July 14, 2
2009-07-14
Semiconductor Doping With Reduced Gate Edge Diode Leakage
App 20090127620 - Kohli; Puneet ;   et al.
2009-05-21
Highly conductive shallow junction formation
Grant 7,531,436 - Kohli May 12, 2
2009-05-12
Method for manufacturing an isolation structure using an energy beam treatment
Grant 7,524,777 - Kohli , et al. April 28, 2
2009-04-28
Bipolar Transistors With Resistors
App 20090101988 - Kohli; Puneet
2009-04-23
Method for manufacturing a gate sidewall spacer using an energy beam treatment
Grant 7,465,635 - Kohli , et al. December 16, 2
2008-12-16
Semiconductor Device Manufactured Using a Laminated Stress Layer
App 20080277730 - Mehrotra; Manoj ;   et al.
2008-11-13
N-type Semiconductor Component With Improved Dopant Implantation Profile And Method Of Forming Same
App 20080268628 - Kohli; Puneet ;   et al.
2008-10-30
Formation of fully silicided gate with oxide barrier on the source/drain silicide regions
App 20080206988 - Kohli; Puneet ;   et al.
2008-08-28
Method For Manufacturing An Isolation Structure Using An Energy Beam Treatment
App 20080146043 - Kohli; Puneet ;   et al.
2008-06-19
Method For Manufacturing A Gate Sidewall Spacer Using An Energy Beam Treatment
App 20080076225 - Kohli; Puneet ;   et al.
2008-03-27
Method For Forming A Pre-metal Dielectric Layer Using An Energy Beam Treatment
App 20080076227 - Kohli; Puneet ;   et al.
2008-03-27
Semiconductive device fabricated using a raised layer to silicide the gate
App 20070184572 - Kohli; Puneet ;   et al.
2007-08-09
Ultra-shallow arsenic junction formation in silicon germanium
Grant 7,163,878 - Kohli , et al. January 16, 2
2007-01-16
Highly conductive shallow junction formation
App 20060183302 - Kohli; Puneet
2006-08-17
Ultra-shallow arsenic junction formation in silicon germanium
App 20060105518 - Kohli; Puneet ;   et al.
2006-05-18
Systems, methods and computer program products for assigning at least one task to at least one shift
App 20040268349 - Ramakrishnan, Vishwamitra S. ;   et al.
2004-12-30
Systems, methods and computer program products for generating at least one shift schedule
App 20040193472 - Ramakrishnan, Vishwamitra S. ;   et al.
2004-09-30

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