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Patent applications and USPTO patent grants for Koey; Dominic.The latest application filed is for "fan-out wafer level package containing back-to-back embedded microelectronic components and assembly method therefor".
Patent | Date |
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Fan-out Wafer Level Package Containing Back-to-back Embedded Microelectronic Components And Assembly Method Therefor App 20160086930 - Koey; Dominic ;   et al. | 2016-03-24 |
Integrated circuit with recess for die attachment Grant 9,171,786 - Chan , et al. October 27, 2 | 2015-10-27 |
Lead Frame Based Semiconductor Device With Power Bars App 20150206769 - Muniandy; Kesvakumar V.C. ;   et al. | 2015-07-23 |
Semiconductor device with redistributed contacts Grant 8,765,527 - Koey July 1, 2 | 2014-07-01 |
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