loadpatents
name:-0.017446994781494
name:-0.011129140853882
name:-0.0015988349914551
Kobayashi; Naohiro Patent Filings

Kobayashi; Naohiro

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kobayashi; Naohiro.The latest application filed is for "method of producing organic-inorganic hybrid infrared absorbing particles and organic-inorganic hybrid infrared absorbing particles".

Company Profile
1.11.17
  • Kobayashi; Naohiro - Otokuni-gun JP
  • KOBAYASHI; Naohiro - Yamagata JP
  • KOBAYASHI; Naohiro - Shiojiri JP
  • Kobayashi; Naohiro - Nagano JP
  • Kobayashi; Naohiro - Kanagawa JP
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Lens unit and camera module
Grant 11,391,905 - Endo , et al. July 19, 2
2022-07-19
Method Of Producing Organic-inorganic Hybrid Infrared Absorbing Particles And Organic-inorganic Hybrid Infrared Absorbing Particles
App 20220049105 - TSUNEMATSU; Hirofumi ;   et al.
2022-02-17
Method For Controlling Electronic Watch And Electronic Watch
App 20220045636 - KOBAYASHI; Naohiro
2022-02-10
Lens Unit And Camera Module
App 20210165184 - ENDO; Hidehiro ;   et al.
2021-06-03
Electronic Timepiece And Indicator Position Detection Method
App 20200117144 - KOBAYASHI; Naohiro
2020-04-16
Electronic timepiece and time difference correction method
Grant 9,411,318 - Kobayashi August 9, 2
2016-08-09
Electronic Timepiece And Time Difference Correction Method
App 20150268635 - KOBAYASHI; Naohiro
2015-09-24
Method of designing semiconductor device including adjusting for gate antenna violation
Grant 8,341,560 - Kobayashi December 25, 2
2012-12-25
Layout method and layout apparatus for semiconductor integrated circuit
Grant 8,239,803 - Kobayashi August 7, 2
2012-08-07
Layout design method of semiconductor integrated circuit including regenerating a cell layout to set first and second distances and generating library data
Grant 8,219,965 - Kobayashi July 10, 2
2012-07-10
Dummy pattern placement apparatus, method and program and semiconductor device
Grant 8,122,386 - Kobayashi February 21, 2
2012-02-21
Semiconductor device and dummy pattern arrangement method
Grant 8,072,078 - Kobayashi December 6, 2
2011-12-06
Layout method and layout apparatus for semiconductor integrated circuit
App 20110289467 - Kobayashi; Naohiro
2011-11-24
Semiconductor integrated circuit, layout design method of semiconductor integrated circuit, and layout program product for same
App 20110265056 - Kobayashi; Naohiro
2011-10-27
Layout method and layout apparatus for semiconductor integrated circuit
Grant 8,020,121 - Kobayashi September 13, 2
2011-09-13
Layout design method of semiconductor integrated circuit cell to adjust distances inside cell between diffusion layers and borders of cell
Grant 8,001,517 - Kobayashi August 16, 2
2011-08-16
Method Of Designing Semiconductor Device
App 20110055776 - Kobayashi; Naohiro
2011-03-03
Semiconductor device and dummy pattern arrangement method
Grant 7,761,833 - Kobayashi July 20, 2
2010-07-20
Semiconductor Device And Dummy Pattern Arrangement Method
App 20100084769 - KOBAYASHI; Naohiro
2010-04-08
Semiconductor integrated circuit, layout design method of semiconductor integrated circuit, and layout program product for same
App 20100077371 - Kobayashi; Naohiro
2010-03-25
Semiconductor apparatus design method in which dummy line is placed in close proximity to signal line
Grant 7,665,055 - Kobayashi February 16, 2
2010-02-16
Semiconductor integrated circuit, layout design method of semiconductor integrated circuit, and layout program product for same
App 20100001763 - Kobayashi; Naohiro
2010-01-07
Layout method and layout apparatus for semiconductor integrated circuit
App 20090093099 - Kobayashi; Naohiro
2009-04-09
Dummy pattern placement apparatus, method and program and semiconductor device
App 20090049420 - Kobayashi; Naohiro
2009-02-19
System and method for automatic layout of integrated circuit
App 20090019413 - Kobayashi; Naohiro
2009-01-15
Semiconductor integrated circuit, layout design method of semiconductor integrated circuit, and layout program product for same
App 20080309374 - Kobayashi; Naohiro
2008-12-18
Semiconductor Device And Dummy Pattern Arrangement Method
App 20080251930 - Kobayashi; Naohiro
2008-10-16
Semiconductor apparatus design method and execution program therefor
App 20070288879 - Kobayashi; Naohiro
2007-12-13

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed