Kleint; Christoph

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kleint; Christoph.The latest application filed is for "integrated circuit and method of forming an integrated circuit".

Company Profile

0.13.15

Kleint; Christoph - Dresden DE

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Integrated circuit including structures arranged at different densities and method of forming the same Grant 8,021,933 - Olligs , et al. September 20, 2	2011-09-20
Integrated circuit and method of forming an integrated circuit Grant 8,009,477 - Kleint , et al. August 30, 2	2011-08-30
Memory device, a non-volatile semiconductor memory device and a method of forming a memory device Grant 7,733,698 - Deppe , et al. June 8, 2	2010-06-08
Buried bitline with reduced resistance Grant 7,678,654 - Kleint , et al. March 16, 2	2010-03-16
Integrated Circuit And Method Of Forming An Integrated Circuit App 20100027311 - Kleint; Christoph ; et al.	2010-02-04
Integrated Circuit Including Structures Arranged at Different Densities and Method of Forming the Same App 20090057743 - Olligs; Dominik ; et al.	2009-03-05
Interconnection structure and method of manufacturing the same Grant 7,462,038 - Knoefler , et al. December 9, 2	2008-12-09
Interconnection Structure and Integrated Circuit App 20080296778 - Roessiger; Martin ; et al.	2008-12-04
Memory Device, A Non-volatile Semiconductor Memory Device And A Method Of Forming A Memory Device App 20080232170 - Deppe; Joachim ; et al.	2008-09-25
Interconnection Structure And Method Of Manufacturing The Same App 20080200046 - Knoefler; Roman ; et al.	2008-08-21
Method for fabricating an NROM memory cell arrangement Grant 7,323,383 - Deppe , et al. January 29, 2	2008-01-29
SONOS memory cells and arrays and method of forming the same Grant 7,323,388 - Deppe , et al. January 29, 2	2008-01-29
Buried bitline with reduced resistance App 20080002466 - Kleint; Christoph ; et al.	2008-01-03
Memory cell Grant 7,274,069 - Deppe , et al. September 25, 2	2007-09-25
Method for fabricating NROM memory cells with trench transistors Grant 7,205,195 - Kleint , et al. April 17, 2	2007-04-17
Method for fabricating an NROM memory cell array Grant 7,094,648 - Deppe , et al. August 22, 2	2006-08-22
Semiconductor memory with vertical charge-trapping memory cells and fabrication App 20060065922 - Kleint; Christoph ; et al.	2006-03-30
Method for fabricating a semiconductor memory having charge trapping memory cells and semiconductor substrate Grant 7,015,095 - Krause , et al. March 21, 2	2006-03-21
Method for fabricating semiconductor memories with charge trapping memory cells Grant 7,005,355 - Kleint , et al. February 28, 2	2006-02-28
Semiconductor memory with vertical charge-trapping memory cells and fabrication Grant 6,992,348 - Kleint , et al. January 31, 2	2006-01-31
SONOS memory cells and arrays and method of forming the same App 20050196923 - Deppe, Joachim ; et al.	2005-09-08
Method for fabricating an NROM memory cell array App 20050164456 - Deppe, Joachim ; et al.	2005-07-28
Method for fabricating an NROM memory cell arrangement App 20050158953 - Deppe, Joachim ; et al.	2005-07-21
Method for fabricating NROM memory cells with trench transistors App 20050085037 - Kleint, Christoph ; et al.	2005-04-21
Memory cell App 20050030780 - Deppe, Joachim ; et al.	2005-02-10
Method for fabricating a semiconductor memory having charge trapping memory cells and semiconductor substrate App 20050003613 - Krause, Mathias ; et al.	2005-01-06
Semiconductor memory with vertical charge-trapping memory cells and fabrication App 20040164345 - Kleint, Christoph ; et al.	2004-08-26
Method for fabricating semiconductor memories with charge trapping memory cells App 20040147072 - Kleint, Christoph ; et al.	2004-07-29

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