Klein; Richard K.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Klein; Richard K..The latest application filed is for "emulation of long delay chain by ring oscillator with floating body-tied body devices".

Company Profile

0.16.1

Klein; Richard K. - Mountain View CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Method for fabricating an SOI device Grant 7,465,639 - Pelella , et al. December 16, 2	2008-12-16
Emulation of long delay chain by ring oscillator with floating body-tied body devices Grant 7,205,825 - Klein , et al. April 17, 2	2007-04-17
Discontinuous nitride structure for non-volatile transistors Grant 6,828,607 - Pelella , et al. December 7, 2	2004-12-07
Emulation of long delay chain by ring oscillator with floating body-tied body devices App 20040108886 - Klein, Richard K. ; et al.	2004-06-10
Method of forming four transistor SRAM cell having a resistor Grant 6,297,083 - Klein October 2, 2	2001-10-02
Minimizing transistor size in integrated circuits Grant 6,146,954 - Klein , et al. November 14, 2	2000-11-14
Forming local interconnects in integrated circuits Grant 6,051,881 - Klein , et al. April 18, 2	2000-04-18
P-channel thin film transistor having a gate on the drain region of a field effect transistor Grant 6,046,478 - Klein April 4, 2	2000-04-04
Method for self-aligning polysilicon gates with field isolation and the resultant structure Grant 6,046,088 - Klein , et al. April 4, 2	2000-04-04
Copper reservoir for reducing electromigration effects associated with a conductive via in a semiconductor device Grant 5,770,519 - Klein , et al. June 23, 1	1998-06-23
Copper pellet for reducing electromigration effects associated with a conductive via in a semiconductor device Grant 5,646,448 - Klein , et al. July 8, 1	1997-07-08
Copper pellet for reducing electromigration effects associated with a conductive via in a semiconductor device Grant 5,639,691 - Klein , et al. June 17, 1	1997-06-17
Method for eliminating window mask process in the fabrication of a semiconductor wafer when chemical-mechanical polish planarization is used Grant 5,627,110 - Lee , et al. May 6, 1	1997-05-06
Contact plug and interconnect employing a barrier lining and a backfilled conductor material Grant 4,960,732 - Dixit , et al. October 2, 1	1990-10-02
Triple-poly 4T static ram cell with two independent transistor gates Grant 4,951,112 - Choi , et al. August 21, 1	1990-08-21
Reduced area butting contact structure Grant 4,912,540 - Sander , et al. March 27, 1	1990-03-27
Contact plug and interconnect employing a barrier lining and a backfilled conductor material Grant 4,884,123 - Dixit , et al. November 28, 1	1989-11-28

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.