| Patent | Date |
|---|
Device and method for alignment of vertically stacked wafers and die
Grant 11,205,621 - Zhang , et al. December 21, 2 | 2021-12-21 |
Device And Method For Alignment Of Vertically Stacked Wafers And Die
App 20200203286 - ZHANG; John H. ; et al. | 2020-06-25 |
Device and method for alignment of vertically stacked wafers and die
Grant 10,615,125 - Zhang , et al. | 2020-04-07 |
Device And Method For Alignment Of Vertically Stacked Wafers And Die
App 20180114756 - ZHANG; John H. ; et al. | 2018-04-26 |
Device and method for alignment of vertically stacked wafers and die
Grant 9,870,999 - Zhang , et al. January 16, 2 | 2018-01-16 |
Multilayer structure in an integrated circuit for damage prevention and detection and methods of creating the same
Grant 9,646,939 - Zhang , et al. May 9, 2 | 2017-05-09 |
Process for integrated circuit fabrication including a liner silicide with low contact resistance
Grant 9,633,909 - Kleemeier , et al. April 25, 2 | 2017-04-25 |
Backside source-drain contact for integrated circuit transistor devices and method of making same
Grant 9,543,397 - Kleemeier , et al. January 10, 2 | 2017-01-10 |
Junctionless Finfet Device And Method For Manufacture
App 20160300857 - Liu; Qing ; et al. | 2016-10-13 |
Multilayer Structure In An Integrated Circuit For Damage Prevention And Detection And Methods Of Creating The Same
App 20160218070 - Zhang; John H. ; et al. | 2016-07-28 |
Multilayer structure in an integrated circuit for damage prevention and detection and methods of creating the same
Grant 9,337,087 - Zhang , et al. May 10, 2 | 2016-05-10 |
Process For Integrated Circuit Fabrication Including A Liner Silicide With Low Contact Resistance
App 20160118305 - Kleemeier; Walter ; et al. | 2016-04-28 |
Device and method for alignment of vertically stacked wafers and die
Grant 9,324,660 - Zhang , et al. April 26, 2 | 2016-04-26 |
Device And Method For Alignment Of Vertically Stacked Wafers And Die
App 20160079131 - ZHANG; John H. ; et al. | 2016-03-17 |
Backside Source-drain Contact For Integrated Circuit Transistor Devices And Method Of Making Same
App 20160056249 - Kleemeier; Walter ; et al. | 2016-02-25 |
Integrated circuit including a liner silicide with low contact resistance
Grant 9,240,454 - Liu , et al. January 19, 2 | 2016-01-19 |
Backside Source-drain Contact For Integrated Circuit Transistor Devices And Method Of Making Same
App 20150357477 - Zhang; John Hongguang ; et al. | 2015-12-10 |
Backside source-drain contact for integrated circuit transistor devices and method of making same
Grant 9,209,305 - Zhang , et al. December 8, 2 | 2015-12-08 |
Graphene capped HEMT device
Grant 8,987,780 - Zhang , et al. March 24, 2 | 2015-03-24 |
Graphene Capped Hemt Device
App 20140353722 - Zhang; John H. ; et al. | 2014-12-04 |
System and method of combining damascenes and subtract metal etch for advanced back end of line interconnections
Grant 8,900,990 - Zhang , et al. December 2, 2 | 2014-12-02 |
System And Method Of Combining Damascenes And Subtract Metal Etch For Advanced Back End Of Line Interconnections
App 20140183735 - ZHANG; John H. ; et al. | 2014-07-03 |
Device And Method For Alignment Of Vertically Stacked Wafers And Die
App 20140027933 - Zhang; John H. ; et al. | 2014-01-30 |
Device and method for alignment of vertically stacked wafers and die
Grant 8,569,899 - Zhang , et al. October 29, 2 | 2013-10-29 |
Method of determining pressure to apply to wafers during a CMP
Grant 8,560,111 - Zhang , et al. October 15, 2 | 2013-10-15 |
Copper interconnect structure having a graphene cap
Grant 8,476,765 - Zhang , et al. July 2, 2 | 2013-07-02 |
Copper Interconnect Structure Having A Graphene Cap
App 20120139114 - Zhang; John Hongguang ; et al. | 2012-06-07 |
Device And Method For Alignment Of Vertically Stacked Wafers And Die
App 20110156284 - Zhang; John H. ; et al. | 2011-06-30 |
Method Of Determining Pressure To Apply To Wafers During A Cmp
App 20100167629 - Zhang; John H. ; et al. | 2010-07-01 |
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