Kitchin; Paul E.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kitchin; Paul E..The latest application filed is for "register renaming of a shareable instruction operand cache".

Company Profile

6.10.11

Kitchin; Paul E. - Austin TX

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Memory load to load fusing Grant 10,956,155 - Kitchin , et al. March 23, 2	2021-03-23
Register renaming of a shareable instruction operand cache Grant 10,891,135 - Kitchin , et al. January 12, 2	2021-01-12
Register Renaming Of A Shareable Instruction Operand Cache App 20200225954 - KITCHIN; Paul E. ; et al.	2020-07-16
Memory Load To Load Fusing App 20190278603 - KITCHIN; Paul E. ; et al.	2019-09-12
Memory load to load fusing Grant 10,372,452 - Kitchin , et al.	2019-08-06
Instruction prefetcher dynamically controlled by readily available prefetcher accuracy Grant 10,296,463 - Kitchin	2019-05-21
Memory load and arithmetic load unit (ALU) fusing Grant 10,275,217 - Gopal , et al.	2019-04-30
Memory Load And Arithmetic Load Unit (alu) Fusing App 20180267775 - GOPAL; Rama S. ; et al.	2018-09-20
Memory Load To Load Fusing App 20180267800 - KITCHIN; Paul E. ; et al.	2018-09-20
Instruction Prefetcher Dynamically Controlled By Readily Available Prefetcher Accuracy App 20170199739 - KITCHIN; Paul E.	2017-07-13
Methods and apparatus related to processor sleep states Grant 9,383,801 - Branover , et al. July 5, 2	2016-07-05
Accelerated cache rinse when preparing a power state transition Grant 9,317,100 - Kitchin , et al. April 19, 2	2016-04-19
Method and apparatus for handling processor read-after-write hazards with cache misses Grant 9,274,970 - Kitchin March 1, 2	2016-03-01
Decoupling L2 Btb From L2 Cache To Accelerate Search For Miss After Miss App 20150268961 - ZURASKI; Gerald D. ; et al.	2015-09-24
Method And Apparatus For Handling Processor Read-after-write Hazards With Cache Misses App 20150186285 - KITCHIN; Paul E.	2015-07-02
Accelerated Cache Rinse When Preparing A Power State Transition App 20140195832 - Kitchin; Paul E. ; et al.	2014-07-10
Methods And Apparatus Related To Processor Sleep States App 20140181557 - Branover; Alexander J. ; et al.	2014-06-26

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.