Kinter; Ryan C

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kinter; Ryan C.The latest application filed is for "fault detecting and fault tolerant multi-threaded processors".

Company Profile

1.30.35

Kinter; Ryan C - Seattle WA
Kinter; Ryan C. - Seattle WA
Kinter; Ryan C. - Sammamish WA
Kinter; Ryan C. - Los Altos CA
Kinter; Ryan C. - Sunnyvale CA
Kinter; Ryan C. - Lost Altos CA
Kinter; Ryan C. - Mountain View CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Fault detecting and fault tolerant multi-threaded processors Grant 10,782,977 - Mace , et al. Sept	2020-09-22
Fault Detecting And Fault Tolerant Multi-threaded Processors App 20190073225 - Mace; Timothy Charles ; et al.	2019-03-07
Apparatus and Method for Low Overhead Correlation of Multi-Processor Trace Information App 20130067284 - Berg; Thomas Benjamin ; et al.	2013-03-14
Coherent instruction cache utilizing cache-op execution resources Grant 8,392,663 - Kinter , et al. March 5, 2	2013-03-05
Support for Multiple Coherence Domains App 20130031314 - Kinter; Ryan C.	2013-01-31
Multithreaded Operation of A Microprocessor Cache App 20120290780 - Kinter; Ryan C. ; et al.	2012-11-15
Apparatus and method for condensing trace information in a multi-processor system Grant 8,230,202 - Berg , et al. July 24, 2	2012-07-24
Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency Grant 8,151,268 - Jones , et al. April 3, 2	2012-04-03
Support for multiple coherence domains Grant 8,131,941 - Kinter March 6, 2	2012-03-06
Three-tiered translation lookaside buffer hierarchy in a multithreading microprocessor Grant 7,925,859 - Banerjee , et al. April 12, 2	2011-04-12
Microprocessor instruction using address index values to enable access of a virtual buffer in circular fashion Grant 7,873,810 - Jones , et al. January 18, 2	2011-01-18
Instruction/skid buffers in a multithreading microprocessor that store dispatched instructions to avoid re-fetching flushed instructions Grant 7,853,777 - Jones , et al. December 14, 2	2010-12-14
Avoiding livelock using intervention messages in multiple core processors Grant 7,769,958 - Kinter , et al. August 3, 2	2010-08-03
Leaky-bucket thread scheduler in a multithreading microprocessor Grant 7,752,627 - Jones , et al. July 6, 2	2010-07-06
Avoiding livelock using a cache manager in multiple core processors Grant 7,739,455 - Vishin , et al. June 15, 2	2010-06-15
Multithreading Microprocessor With Optimized Thread Scheduler For Increasing Pipeline Utilization Efficiency App 20100115244 - Jensen; Michael Gottlieb ; et al.	2010-05-06
Mapping system and method for instruction set processing Grant 7,711,926 - Kinter , et al. May 4, 2	2010-05-04
Multi-ISA instruction fetch unit for a processor, and applications thereof Grant 7,707,389 - Banerjee , et al. April 27, 2	2010-04-27
Multithreading instruction scheduler employing thread group priorities Grant 7,681,014 - Jensen , et al. March 16, 2	2010-03-16
Prioritizing thread selection partly based on stall likelihood providing status information of instruction operand register usage at pipeline stages Grant 7,664,936 - Jensen , et al. February 16, 2	2010-02-16
Multithreading instruction scheduler employing thread group priorities Grant 7,660,969 - Jensen , et al. February 9, 2	2010-02-09
Methods for reducing data cache access power in a processor using way selection bits Grant 7,657,708 - Knoth , et al. February 2, 2	2010-02-02
Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency Grant 7,657,891 - Jensen , et al. February 2, 2	2010-02-02
Micro tag array having way selection bits for reducing data cache access power Grant 7,650,465 - Knoth , et al. January 19, 2	2010-01-19
Three-Tiered Translation Lookaside Buffer Hierarchy in a Multithreading Microprocessor App 20090327649 - BANERJEE; Soumya ; et al.	2009-12-31
Method and apparatus for redirection of operations between interfaces Grant 7,634,619 - Intrater , et al. December 15, 2	2009-12-15
Apparatus and method for discrete test access control of multiple cores Grant 7,627,794 - Kinter December 1, 2	2009-12-01
Interfacing external thread prioritizing policy enforcing logic with customer modifiable register to processor internal scheduler Grant 7,613,904 - Jones , et al. November 3, 2	2009-11-03
Apparatus And Method For Condensing Trace Information In A Multi-processor System App 20090249045 - BERG; Thomas Benjamin ; et al.	2009-10-01
Apparatus And Method For Low Overhead Correlation Of Multi-processor Trace Information App 20090249046 - BERG; Thomas Benjamin ; et al.	2009-10-01
Smart memory based synchronization controller for a multi-threaded multiprocessor SoC Grant 7,594,089 - Vishin , et al. September 22, 2	2009-09-22
Three-tiered translation lookaside buffer hierarchy in a multithreading microprocessor Grant 7,558,939 - Banerjee , et al. July 7, 2	2009-07-07
Coherent Instruction Cache Utilizing Cache-op Execution Resources App 20090157981 - Kinter; Ryan C. ; et al.	2009-06-18
Support For Multiple Coherence Domains App 20090083493 - Kinter; Ryan C.	2009-03-26
Apparatus and method for discovering a scratch pad memory configuration Grant 7,509,456 - Kinter , et al. March 24, 2	2009-03-24
Avoiding Livelock Using Intervention Messages in Multiple Core Processors App 20080320231 - Kinter; Ryan C. ; et al.	2008-12-25
Reduced Handling of Writeback Data App 20080320233 - Kinter; Ryan C.	2008-12-25
Avoiding Livelock Using A Cache Manager in Multiple Core Processors App 20080320230 - Vishin; Sanjay ; et al.	2008-12-25
Methods for reducing data cache access power in a processor, and applications thereof App 20080046653 - Knoth; Matthias ; et al.	2008-02-21
Processor having a micro tag array that reduces data cache access power, and applicatons thereof App 20080046652 - Knoth; Matthias ; et al.	2008-02-21
Microprocessor instructions for efficient bit stream extractions Grant 7,315,937 - Jones , et al. January 1, 2	2008-01-01
Apparatus and method for discrete test access control of multiple cores App 20070288814 - Kinter; Ryan C.	2007-12-13
Multithreading Instruction Scheduler Employing Thread Group Priorities App 20070113053 - Jensen; Michael Gottlieb ; et al.	2007-05-17
Three-tiered translation lookaside buffer hierarchy in a multithreading microprocessor App 20060206686 - Banerjee; Soumya ; et al.	2006-09-14
Multithreading microprocessor with optimized thread scheduler for increasing pipeline utilization efficiency App 20060179284 - Jensen; Michael Gottlieb ; et al.	2006-08-10
Bifurcated thread scheduler in a multithreading microprocessor App 20060179279 - Jones; Darren M. ; et al.	2006-08-10
Multithreading instruction scheduler employing thread group priorities App 20060179281 - Jensen; Michael Gottlieb ; et al.	2006-08-10
Multithreading processor including thread scheduler based on instruction stall likelihood prediction App 20060179280 - Jensen; Michael Gottlieb ; et al.	2006-08-10
Leaky-bucket thread scheduler in a multithreading microprocessor App 20060179439 - Jones; Darren M. ; et al.	2006-08-10
Instruction/skid buffers in a multithreading microprocessor App 20060179274 - Jones; Darren M. ; et al.	2006-08-10
Microprocessor instructions for efficient bit stream extractions App 20060101258 - Jones; Darren M. ; et al.	2006-05-11
Microprocessor instruction using address index values to enable access of a virtual buffer in circular fashion App 20060075208 - Jones; Darren M. ; et al.	2006-04-06
Method and apparatus for redirection of operations between interfaces App 20060036808 - Intrater; Gideon D. ; et al.	2006-02-16
Smart memory based synchronization controller for a multi-threaded multiprocessor SoC App 20050251639 - Vishin, Sanjay ; et al.	2005-11-10
Method and apparatus for redirection of operations between interfaces Grant 6,961,819 - Intrater , et al. November 1, 2	2005-11-01
Apparatus and method for preventing duplicate matching entries in a translation lookaside buffer App 20050182903 - Kinter, Ryan C. ; et al.	2005-08-18
Method and apparatus for recoding instructions App 20050177707 - Banerjee, Soumya ; et al.	2005-08-11
Apparatus and method for discovering a scratch pad memory configuration App 20050102483 - Kinter, Ryan C. ; et al.	2005-05-12
Apparatus and method for discovering a scratch pad memory configuration Grant 6,836,833 - Kinter , et al. December 28, 2	2004-12-28
Method and apparatus for redirection of operations between interfaces App 20030204685 - Intrater, Gideon D. ; et al.	2003-10-30
Mapping system and method for instruction set processing App 20020156996 - Kinter, Ryan C. ; et al.	2002-10-24
Scratchpad RAM memory accessible in parallel to a primary cache Grant 6,430,655 - Courtright , et al. August 6, 2	2002-08-06

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.