King; Paul L.

Patent Applications and Registrations

Patent applications and USPTO patent grants for King; Paul L..The latest application filed is for "selectable open circuit and anti-fuse element".

Company Profile

0.30.6

King; Paul L. - Mountain View CA
King; Paul L. - Mountain CA
King, Paul L. - Mountian View CA
King; Paul L. - Ithaca NY
King; Paul L. - Stockholm WI

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Composite barrier layers with controlled copper interface surface roughness Grant 7,755,194 - Marathe , et al. July 13, 2	2010-07-13
Selectable open circuit and anti-fuse element Grant 7,250,667 - Chan , et al. July 31, 2	2007-07-31
Conversion of transition metal to silicide through back end processing in integrated circuit technology Grant 7,151,020 - Patton , et al. December 19, 2	2006-12-19
Selectable Open Circuit And Anti-fuse Element App 20060208321 - Chan; Darin A. ; et al.	2006-09-21
Reduction of lateral silicide growth in integrated circuit technology Grant 7,064,067 - King , et al. June 20, 2	2006-06-20
Method of forming composite barrier layers with controlled copper interface surface roughness Grant 7,033,940 - Marathe , et al. April 25, 2	2006-04-25
Selectable open circuit and anti-fuse element, and fabrication method therefor Grant 7,015,076 - Chan , et al. March 21, 2	2006-03-21
Low stress sidewall spacer in integrated circuit technology Grant 7,005,357 - Ngo , et al. February 28, 2	2006-02-28
Low stress sidewall spacer in integrated circuit technology App 20050153496 - Ngo, Minh Van ; et al.	2005-07-14
Silicide process using high K-dielectrics Grant 6,784,506 - Xiang , et al. August 31, 2	2004-08-31
Passivation of nitride spacer Grant 6,764,912 - Foster , et al. July 20, 2	2004-07-20
Method of reducing electromigration by forming an electroplated copper-zinc interconnect and a semiconductor device thereby formed Grant 6,717,236 - Lopatin , et al. April 6, 2	2004-04-06
Method of reducing electromigration by ordering zinc-doping in an electroplated copper-zinc interconnect and a semiconductor device thereby formed Grant 6,630,741 - Lopatin , et al. October 7, 2	2003-10-07
Method of fabricating a semiconductor device by calcium doping a copper surface using a chemical solution Grant 6,624,074 - Lopatin , et al. September 23, 2	2003-09-23
Semiconductor device fabricated by reducing carbon, sulphur, and oxygen impurities in a calcium-doped copper surface Grant 6,621,165 - Lopatin , et al. September 16, 2	2003-09-16
Automated control of metal thickness during film deposition Grant 6,611,576 - Besser , et al. August 26, 2	2003-08-26
Method of controlling the formation of metal layers Grant 6,610,181 - Besser , et al. August 26, 2	2003-08-26
Method of forming nickel silicide using a one-step rapid thermal anneal process and backend processing Grant 6,605,513 - Paton , et al. August 12, 2	2003-08-12
Metal silicide gate transistors Grant 6,602,781 - Xiang , et al. August 5, 2	2003-08-05
Process for forming fully silicided gates Grant 6,562,718 - Xiang , et al. May 13, 2	2003-05-13
Electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors Grant 6,559,051 - Buynoski , et al. May 6, 2	2003-05-06
Improved Silicide Process Using High K-dielectrics App 20030042515 - Xiang, Qi ; et al.	2003-03-06
Silicide stop layer in a damascene semiconductor structure App 20030034533 - Paton, Eric N. ; et al.	2003-02-20
Damascene NiSi metal gate high-k transistor Grant 6,475,874 - Xiang , et al. November 5, 2	2002-11-05
Semiconductor device formed by calcium doping a copper surface using a chemical solution Grant 6,469,387 - Lopatin , et al. October 22, 2	2002-10-22
Silicide gate transistors Grant 6,465,309 - Xiang , et al. October 15, 2	2002-10-15
Enhanced electroless deposition of dielectric precursor materials for use in in-laid gate MOS transistors Grant 6,465,334 - Buynoski , et al. October 15, 2	2002-10-15
Method of reducing carbon, sulphur, and oxygen impurities in a calcium-doped copper surface and semiconductor device thereby formed Grant 6,444,580 - Lopatin , et al. September 3, 2	2002-09-03
Damascene nisi metal gate high-k transistor App 20020102848 - Xiang, Qi ; et al.	2002-08-01
Method Of Forming Nickel Silicide Using A One-step Rapid Thermal Anneal Process And Backend Processing App 20020068408 - Paton, Eric N. ; et al.	2002-06-06
Enhancement of nickel silicide formation by use of nickel pre-amorphizing implant Grant 6,380,057 - Buynoski , et al. April 30, 2	2002-04-30
Silicide gate transistors Grant 6,368,950 - Xiang , et al. April 9, 2	2002-04-09
Electrolytic deposition of dielectric precursor materials for use in in-laid gate MOS transistors Grant 6,300,203 - Buynoski , et al. October 9, 2	2001-10-09
High dielectric constant materials as gate dielectrics Grant 6,297,107 - Paton , et al. October 2, 2	2001-10-02
Electronic keyboard system and method for reproducing selected symbolic language characters Grant 4,679,951 - King , et al. July 14, 1	1987-07-14
Safety clamp device and apparatus utilizing same Grant 4,181,194 - Bassett , et al. January 1, 1	1980-01-01

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