| Patent | Date |
|---|
Novel 3d Nand Memory Device And Method Of Forming The Same
App 20210327900 - OH; Jin Yong ; et al. | 2021-10-21 |
Novel 3d Nand Memory Device And Method Of Forming The Same
App 20210280606 - OH; Jin Yong ; et al. | 2021-09-09 |
High Capacity Memory Circuit With Low Effective Latency
App 20210247910 - Kim; Youn Cheul ; et al. | 2021-08-12 |
Quasi-volatile System-level Memory
App 20210248094 - Norman; Robert D. ; et al. | 2021-08-12 |
3D NAND memory device and method of forming the same
Grant 11,088,166 - Oh , et al. August 10, 2 | 2021-08-10 |
Structure and method for testing three-dimensional memory device
Grant 10,998,079 - Kim , et al. May 4, 2 | 2021-05-04 |
3d Nand Memory Device And Method Of Forming The Same
App 20200411541 - Oh; Jin Yong ; et al. | 2020-12-31 |
Structure And Method For Testing Three-dimensional Memory Device
App 20200265913 - KIM; Jong Jun ; et al. | 2020-08-20 |
Structure and method for testing three-dimensional memory device
Grant 10,679,721 - Kim , et al. | 2020-06-09 |
Structure And Method For Testing Three-dimensional Memory Device
App 20190057756 - Kim; Jong Jun ; et al. | 2019-02-21 |
Memory Apparatus Having Power Pad
App 20160148884 - KIM; Youn Cheul | 2016-05-26 |
Semiconductor devices including E-fuse arrays
Grant 9,257,196 - Kim February 9, 2 | 2016-02-09 |
Circuit for small swing data line and method of operating the same
Grant 9,142,283 - Kim September 22, 2 | 2015-09-22 |
Power supply scheme for small swing data line and method of operating the same
Grant 9,142,282 - Kim September 22, 2 | 2015-09-22 |
Semiconductor Devices Including E-fuse Arrays
App 20150221392 - KIM; Youn Cheul | 2015-08-06 |
Circuit For Small Swing Data Line And Method Of Operating The Same
App 20150187408 - Kim; Youn Cheul | 2015-07-02 |
Power Supply Scheme For Small Swing Data Line And Method Of Operating The Same
App 20150187407 - KIM; Youn Cheul | 2015-07-02 |
Delay-locked loop having a loop bandwidth dependency on phase error
Grant 8,742,809 - Kim June 3, 2 | 2014-06-03 |
Delay-locked Loop Having A Loop Bandwidth Dependency On Phase Error
App 20130329513 - Kim; Youn-Cheul | 2013-12-12 |
Delay-locked loop having loop bandwidth dependency on operating frequency
Grant 8,531,909 - Kim September 10, 2 | 2013-09-10 |
Delay-locked loop having a loop bandwidth dependency on phase error
Grant 8,513,991 - Kim August 20, 2 | 2013-08-20 |
Delay-locked Loop Having A Loop Bandwidth Dependency On Phase Error
App 20110309866 - Kim; Youn-Cheul | 2011-12-22 |
Delay-locked Loop Having Loop Bandwidth Dependency On Operating Frequency
App 20110310682 - Kim; Youn-Cheul | 2011-12-22 |
Memory device employing dual clocking for generating systematic code and method thereof
Grant 8,046,665 - Chung , et al. October 25, 2 | 2011-10-25 |
Synchronous memory device
Grant 7,675,791 - Kim March 9, 2 | 2010-03-09 |
Semiconductor memory device and method of generating chip enable signal thereof
Grant 7,633,785 - Kim , et al. December 15, 2 | 2009-12-15 |
Synchronous Memory Device
App 20090244998 - Kim; Youn-cheul | 2009-10-01 |
Synchronous memory device
Grant 7,554,878 - Kim June 30, 2 | 2009-06-30 |
Multiport Semiconductor Memory Device And Associated Refresh Method
App 20090083479 - LEE; Jae-Wook ; et al. | 2009-03-26 |
Semiconductor Memory Device And Method Of Generating Chip Enable Signal Thereof
App 20090015291 - KIM; Doo-Gon ; et al. | 2009-01-15 |
Multi-port Memory Device And Communication System Having The Same
App 20080263287 - KIM; Youn-Cheul | 2008-10-23 |
Memory module with parallel testing
Grant 7,441,167 - Kim , et al. October 21, 2 | 2008-10-21 |
Multi-port semiconductor device and method thereof
Grant 7,433,263 - Kim October 7, 2 | 2008-10-07 |
Memory device employing dual clocking for generating systematic code and method thereof
App 20080162833 - Chung; Hoe-ju ; et al. | 2008-07-03 |
Multi-port memory device and method of controlling the same
Grant 7,369,453 - Kim May 6, 2 | 2008-05-06 |
Memory module with parallel testing
App 20080005631 - Kim; Youn-Cheul ; et al. | 2008-01-03 |
Multi-port semiconductor device and method thereof
App 20070242554 - Kim; Youn-Cheul | 2007-10-18 |
Input/output data pipeline circuit of semiconductor memory device and the semiconductor memory device
Grant 7,266,662 - Kim September 4, 2 | 2007-09-04 |
Multi-port memory device and method of controlling the same
App 20070201297 - Kim; Youn-Cheul | 2007-08-30 |
Memory module with parallel testing
Grant 7,246,280 - Kim , et al. July 17, 2 | 2007-07-17 |
Delay locked loop having a duty cycle correction circuit
Grant 7,202,720 - Kim April 10, 2 | 2007-04-10 |
Synchronous memory device
App 20070047340 - Kim; Youn-cheul | 2007-03-01 |
Duty cycle correction circuit of delay locked loop and the delay locked loop having the duty cycle correction circuit
Grant 7,116,149 - Kim October 3, 2 | 2006-10-03 |
Semiconductor memory device using tapered arrangement of local input and output sense amplifiers
Grant 7,106,612 - Kim September 12, 2 | 2006-09-12 |
Memory module with parallel testing
App 20050216809 - Kim, Youn-Cheul ; et al. | 2005-09-29 |
Duty cycle correction circuit of delay locked loop and the delay locked loop having the duty cycle correction circuit
App 20050212575 - Kim, Youn-cheul | 2005-09-29 |
Semiconductor memory device using tapered arrangement of local input and output sense amplifiers
App 20050169079 - Kim, Youn-cheul | 2005-08-04 |
Duty cycle correction circuit of delay locked loop and the delay locked loop having the duty cycle correction circuit
App 20040232961 - Kim, Youn-cheul | 2004-11-25 |
Input/output data pipeline circuit of semiconductor memory device and the semiconductor memory device
App 20040221119 - Kim, Youn-Cheul | 2004-11-04 |
Input receiver for controlling offset voltage using output feedback signal
Grant 6,707,321 - Cho , et al. March 16, 2 | 2004-03-16 |
Input receiver for controlling offset voltage using output feedback signal
App 20030214341 - Cho, Young-Chan ; et al. | 2003-11-20 |
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