loadpatents
name:-0.018306970596313
name:-0.013184070587158
name:-0.0006251335144043
Kim; Joo Chan Patent Filings

Kim; Joo Chan

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kim; Joo Chan.The latest application filed is for "formation of raised source/drain stuctures in nfet with embedded sige in pfet".

Company Profile
0.10.14
  • Kim; Joo Chan - Fishkill NY
  • Kim; Joo-chan - Gyeonggi-do KR
  • Kim; Joo-Chan - Suwon-si KR
  • Kim; Joo-chan - Seoul KR
  • Kim; Joo-Chan - Suwon-city KR
  • Kim; Joo-Chan - Suwon KR
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Formation of raised source/drain structures in NFET with embedded SiGe in PFET
Grant 8,288,825 - Chong , et al. October 16, 2
2012-10-16
Embedded stressor structure and process
Grant 7,939,413 - Chong , et al. May 10, 2
2011-05-10
Methods of forming integrated circuit devices having ion-cured electrically insulating layers therein
Grant 7,838,390 - Kim , et al. November 23, 2
2010-11-23
Formation Of Raised Source/drain Stuctures In Nfet With Embedded Sige In Pfet
App 20100219485 - CHONG; Yung Fu ;   et al.
2010-09-02
Method Of Forming A Semiconductor Device Having Selective Stress Relaxation Of Etch Stop Layer
App 20100171182 - Shin; Dong-Suk ;   et al.
2010-07-08
Formation of raised source/drain structures in NFET with embedded SiGe in PFET
Grant 7,718,500 - Chong , et al. May 18, 2
2010-05-18
Flash memory device having a split gate
Grant 7,564,092 - Ryu , et al. July 21, 2
2009-07-21
Methods of Forming Integrated Circuit Devices Having Ion-Cured Electrically Insulating Layers Therein
App 20090098706 - Kim; Jun-jung ;   et al.
2009-04-16
Strained Semiconductor Device and Method of Making Same
App 20090050972 - Lindsay; Richard ;   et al.
2009-02-26
Strained semiconductor device and method of making same
App 20080057636 - Lindsay; Richard ;   et al.
2008-03-06
Formation of raised source/drain structures in NFET with embedded SiGe in PFET
App 20070138570 - Chong; Yung Fu ;   et al.
2007-06-21
Embedded stressor structure and process
App 20070132038 - Chong; Yung Fu ;   et al.
2007-06-14
Semiconductor device having a measuring pattern and a method of measuring the semiconductor device using the measuring pattern
Grant 7,195,933 - Park , et al. March 27, 2
2007-03-27
Flash memory device having a split gate
App 20070026613 - Ryu; Eui-youl ;   et al.
2007-02-01
Flash memory device having a split gate and method of manufacturing the same
Grant 7,094,646 - Ryu , et al. August 22, 2
2006-08-22
Split gate type flash memory device and method of manufacturing the same
App 20060001077 - Ryu; Eui-youl ;   et al.
2006-01-05
Method of manufacturing split-gate memory
Grant 6,977,200 - Kim , et al. December 20, 2
2005-12-20
Flash memory device having a split gate and method of manufacturing the same
App 20050250282 - Ryu, Eui-youl ;   et al.
2005-11-10
Semiconductor device having a measuring pattern and a method of measuring the semiconductor device using the measuring pattern
App 20050230786 - Park, Sang-Wook ;   et al.
2005-10-20
Semiconductor device having a measuring pattern and a method of measuring the semiconductor device using the measuring pattern
Grant 6,924,505 - Park , et al. August 2, 2
2005-08-02
Method of manufacturing split-gate memory
App 20050112821 - Kim, Yong-hee ;   et al.
2005-05-26
Semiconductor device having a measuring pattern and a method of measuring the semiconductor device using the measuring pattern
App 20050035433 - Park, Sang-Wook ;   et al.
2005-02-17
Method of manufacturing split gate flash memory device
Grant 6,800,525 - Ryu , et al. October 5, 2
2004-10-05
Method of manufacturing split gate flash memory device
App 20040027861 - Ryu, Eui-Youl ;   et al.
2004-02-12

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed