loadpatents
Patent applications and USPTO patent grants for Kim; Il-Goo.The latest application filed is for "top electrode interconnect structures".
Patent | Date |
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Semiconductor structure and method for fabricating the same Grant 11,423,951 - Kim August 23, 2 | 2022-08-23 |
Top Electrode Interconnect Structures App 20220216148 - KIM; Il Goo ;   et al. | 2022-07-07 |
Top electrode interconnect structures Grant 11,315,870 - Kim , et al. April 26, 2 | 2022-04-26 |
Semiconductor Structure And Method For Fabricating The Same App 20210225849 - KIM; IL-GOO | 2021-07-22 |
Semiconductor Structure And Method For Fabricating The Same App 20210217447 - KIM; IL-GOO | 2021-07-15 |
Top Electrode Interconnect Structures App 20200161236 - KIM; Il Goo ;   et al. | 2020-05-21 |
Methods for fabricating integrated circuits with improved semiconductor fin structures Grant 8,835,328 - Hwang , et al. September 16, 2 | 2014-09-16 |
Methods For Fabricating Integrated Circuits With Improved Semiconductor Fin Structures App 20140227879 - Hwang; Wontae ;   et al. | 2014-08-14 |
Integrated circuit capacitor structure Grant 7,560,332 - Lee , et al. July 14, 2 | 2009-07-14 |
Method of fabricating semiconductor device Grant 7,553,761 - Kim , et al. June 30, 2 | 2009-06-30 |
Method of manufacturing a semiconductor device having air gaps App 20080124917 - Oh; Jun-Hwan ;   et al. | 2008-05-29 |
Method forming metal interconnection filling recessed region using electro-plating technique App 20080073787 - Oh; Jun-Hwan ;   et al. | 2008-03-27 |
Integrated Circuit Capacitor Structure App 20070184610 - Lee; Kyoung-woo ;   et al. | 2007-08-09 |
Integrated circuit capacitor structure Grant 7,229,875 - Lee , et al. June 12, 2 | 2007-06-12 |
Method of fabricating dual damascene interconnection Grant 7,176,126 - Oh , et al. February 13, 2 | 2007-02-13 |
Method of forming metal interconnection layer of semiconductor device Grant 7,157,366 - Kim , et al. January 2, 2 | 2007-01-02 |
Method of fabricating semiconductor device App 20060148264 - Kim; Il-Goo ;   et al. | 2006-07-06 |
Dual damascene process Grant 7,033,944 - Park , et al. April 25, 2 | 2006-04-25 |
Method for filling a hole with a metal Grant 7,026,242 - Son , et al. April 11, 2 | 2006-04-11 |
Method of fabricating dual damascene interconnection App 20060024948 - Oh; Hyeok-sang ;   et al. | 2006-02-02 |
Method of forming a via contact structure using a dual damascene technique Grant 6,924,228 - Kim , et al. August 2, 2 | 2005-08-02 |
Method of forming metal interconnection layer of semiconductor device App 20050037605 - Kim, Il-Goo ;   et al. | 2005-02-17 |
Inter-metal dielectric patterns and method of forming the same Grant 6,849,536 - Lee , et al. February 1, 2 | 2005-02-01 |
Method for filling a hole with a metal App 20040253813 - Son, Hong-Seong ;   et al. | 2004-12-16 |
Method of forming a via contact structure using a dual damascene technique App 20040175932 - Kim, Il-Goo ;   et al. | 2004-09-09 |
Integrated circuit capacitor structure App 20040137694 - Lee, Kyoung-Woo ;   et al. | 2004-07-15 |
Dual damamscene process App 20040058538 - Park, Wan-Jae ;   et al. | 2004-03-25 |
Method for manufacturing a metal-insulator-metal capacitor Grant 6,699,749 - Lee , et al. March 2, 2 | 2004-03-02 |
Inter-metal dielectric patterns and method of forming the same App 20030186538 - Lee, Soo-Geun ;   et al. | 2003-10-02 |
Method of forming wiring using a dual damascene process Grant 6,617,232 - Kim , et al. September 9, 2 | 2003-09-09 |
Method of forming wiring using a dual damascene process App 20030013316 - Kim, Il-Goo ;   et al. | 2003-01-16 |
Method of forming connections with low dielectric insulating layers Grant 6,506,680 - Kim , et al. January 14, 2 | 2003-01-14 |
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