Kim; Hyung-ock

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kim; Hyung-ock.The latest application filed is for "integrated circuit including different types of cells, and method and system of designing the same".

Company Profile

6.13.17

Kim; Hyung-ock - Seoul KR

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Computer implemented methods and computing systems for designing integrated circuits by considering back-end-of-line Grant 10,928,442 - Kim , et al. February 23, 2	2021-02-23
System and method of designing integrated circuit by considering local layout effect Grant 10,817,637 - Ha , et al. October 27, 2	2020-10-27
Integrated circuit including different types of cells, and method and system of designing the same Grant 10,817,640 - Kim , et al. October 27, 2	2020-10-27
Integrated Circuit Including Different Types Of Cells, And Method And System Of Designing The Same App 20200151298 - KIM; JAE-HOON ; et al.	2020-05-14
Method and system for manufacturing an integrated circuit in consideration of a local layout effect Grant 10,599,130 - Kim , et al.	2020-03-24
Integrated circuit designing system and a method of manufacturing an integrated circuit Grant 10,424,518 - Kim , et al. Sept	2019-09-24
Computer Implemented Methods And Computing Systems For Designing Integrated Circuits By Considering Back-end-of-line App 20180231604 - Kim; Tae-il ; et al.	2018-08-16
Method And System For Manufacturing An Integrated Circuit In Consideration Of A Local Layout Effect App 20180210421 - KIM; WOOTAE ; et al.	2018-07-26
System-on-chip and electronic device having the same Grant 10,026,471 - Shin , et al. July 17, 2	2018-07-17
Method for placing parallel multiplier Grant 10,002,219 - Bae , et al. June 19, 2	2018-06-19
Integrated Circuit Designing System And A Method Of Manufacturing An Integrated Circuit App 20180068907 - KIM; TAE IL ; et al.	2018-03-08
System And Method Of Designing Integrated Circuit By Considering Local Layout Effect App 20180032658 - HA; Naya ; et al.	2018-02-01
System-on-chip And Electronic Device Having The Same App 20160322097 - SHIN; In-Sub ; et al.	2016-11-03
Method For Placing Parallel Multiplier App 20160283614 - BAE; Sungmin ; et al.	2016-09-29
Power control circuit, semiconductor device including the same Grant 8,659,316 - Kim , et al. February 25, 2	2014-02-25
Method of designing a system-on-chip including a tapless standard cell, designing system and system-on-chip Grant 8,522,188 - Kim , et al. August 27, 2	2013-08-27
Method Of Designing A System-on-chip Including A Tapless Standard Cell, Designing System And System-on-chip App 20130185692 - KIM; Hyung-Ock ; et al.	2013-07-18
Method Of Generating Standard Cell Library For Dpl Process And Methods Of Producing A Dpl Mask And Circuit Pattern Using The Same App 20130086536 - KIM; WOOK ; et al.	2013-04-04
Power Control Circuit, Semiconductor Device Including The Same App 20130069690 - KIM; Hyung Ock ; et al.	2013-03-21
Semiconductor Device, Method And System With Logic Gate Region Receiving Clock Signal And Body Bias Voltage By Enable Signal App 20120313693 - Do; Kyung Tae ; et al.	2012-12-13
Power gating circuit and integrated circuit including same Grant 7,948,263 - Kim , et al. May 24, 2	2011-05-24
Power Gating Circuit and Integrated Circuit Including Same App 20100231255 - Kim; Hyung-Ock ; et al.	2010-09-16
Power network using standard cell, power gating cell, and semiconductor device using the power network Grant 7,755,396 - Shin , et al. July 13, 2	2010-07-13
Power Network Using Standard Cell, Power Gating Cell, And Semiconductor Device Using The Power Network App 20080012424 - Shin; Youngsoo ; et al.	2008-01-17

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