Khanna; Puneet

Patent Applications and Registrations

Patent applications and USPTO patent grants for Khanna; Puneet.The latest application filed is for "transistor device structures with retrograde wells in cmos applications".

Company Profile

1.14.17

Khanna; Puneet - Clifton Park NY
Khanna; Puneet - Wappingers Falls NY
Khanna; Puneet - Wappinger Falls NY
Khanna; Puneet - Wrappinger Falls NY
Khanna; Puneet - Rancho Mirage CA

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Transistor device structures with retrograde wells in CMOS applications Grant 10,483,172 - Vakada , et al. Nov	2019-11-19
Transistor Device Structures With Retrograde Wells In Cmos Applications App 20180047641 - Vakada; Vara G. Reddy ; et al.	2018-02-15
Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structures Grant 9,852,954 - Vakada , et al. December 26, 2	2017-12-26
Microneedles with sharpened tips and corresponding method of fabrication Grant 9,526,885 - Khanna , et al. December 27, 2	2016-12-27
Blanket EPI super steep retrograde well formation without Si recess Grant 9,362,357 - Kang , et al. June 7, 2	2016-06-07
FinFET spacer etch for eSiGe improvement Grant 9,356,147 - Yu , et al. May 31, 2	2016-05-31
Methods Of Forming Transistors With Retrograde Wells In Cmos Applications And The Resulting Device Structures App 20160035630 - Vakada; Vara G. Reddy ; et al.	2016-02-04
Methods of forming transistors with retrograde wells in CMOS applications and the resulting device structures Grant 9,209,181 - Vakada , et al. December 8, 2	2015-12-08
BLANKET EPI SUPER STEEP RETROGRADE WELL FORMATION WITHOUT Si RECESS App 20150249129 - KANG; Laegu ; et al.	2015-09-03
Method of forming step doping channel profile for super steep retrograde well field effect transistor and resulting device Grant 9,099,380 - Vakada , et al. August 4, 2	2015-08-04
Blanket EPI super steep retrograde well formation without Si recess Grant 9,099,525 - Kang , et al. August 4, 2	2015-08-04
Fin-type Transistor Structures With Extended Embedded Stress Elements And Fabrication Methods App 20150129983 - YU; Hong ; et al.	2015-05-14
Fin-type transistor structures with extended embedded stress elements and fabrication methods Grant 9,024,368 - Yu , et al. May 5, 2	2015-05-05
Semiconductor Isolation Region Uniformity App 20150087134 - CHEN; Tsung-Liang ; et al.	2015-03-26
Method Of Forming Step Doping Channel Profile For Super Steep Retrograde Well Field Effect Transistor And Resulting Device App 20150053981 - VAKADA; Vara Govindeswara Reddy ; et al.	2015-02-26
Removal of nitride bump in opening replacement gate structure Grant 8,927,356 - Chen , et al. January 6, 2	2015-01-06
Method of forming step doping channel profile for super steep retrograde well field effect transistor and resulting device Grant 8,916,442 - Vakada , et al. December 23, 2	2014-12-23
FINFET SPACER ETCH FOR eSiGe IMPROVEMENT App 20140367751 - YU; Hong ; et al.	2014-12-18
Methods Of Forming Transistors With Retrograde Wells In Cmos Applications And The Resulting Device Structures App 20140367787 - Vakada; Vara G. Reddy ; et al.	2014-12-18
Removal Of Nitride Bump In Opening Replacement Gate Structure App 20140370697 - Chen; Tsung-Liang ; et al.	2014-12-18
Method Of Forming Step Doping Channel Profile For Super Steep Retrograde Well Field Effect Transistor And Resulting Device App 20140197411 - VAKADA; Vara Govindeswara Reddy ; et al.	2014-07-17
BLANKET EPI SUPER STEEP RETROGRADE WELL FORMATION WITHOUT Si RECESS App 20140183551 - Kang; Laegu ; et al.	2014-07-03
Gate Structure Formation Processes App 20140179093 - CHOI; Dae-Han ; et al.	2014-06-26
Method Of Tailoring Silicon Trench Profile For Super Steep Retrograde Well Field Effect Transistor App 20140070358 - Qi; Yi ; et al.	2014-03-13
Methods For Fabricating Integrated Circuits Using Tailored Chamfered Gate Liner Profiles App 20130224944 - Khanna; Puneet ; et al.	2013-08-29
Apparatus and methods for facilitating hemostasis within a vascular puncture Grant 8,348,971 - Khanna , et al. January 8, 2	2013-01-08

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