Khan; Babar Ali

Patent Applications and Registrations

Patent applications and USPTO patent grants for Khan; Babar Ali.The latest application filed is for "structure and method for forming isolation and buried plate for trench capacitor".

Company Profile

0.10.9

Khan; Babar Ali - Hopewell Junction NY US
Khan; Babar Ali - Ossining NY

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Structure and method for forming isolation and buried plate for trench capacitor Grant 8,637,958 - Dube , et al. January 28, 2	2014-01-28
Structure And Method For Forming Isolation And Buried Plate For Trench Capacitor App 20130009277 - Dube; Abhishek ; et al.	2013-01-10
Structure and method for forming isolation and buried plate for trench capacitor Grant 8,298,908 - Dube , et al. October 30, 2	2012-10-30
Structure And Method For Forming Isolation And Buried Plate For Trench Capacitor App 20110193193 - Dube; Abhishek ; et al.	2011-08-11
DRAM (dynamic random access memory) cells Grant 7,655,967 - Cheng , et al. February 2, 2	2010-02-02
System For Power Performance Optimization Of Multicore Processor Chip App 20090267179 - Iyer; Subramanian S. ; et al.	2009-10-29
DRAM (Dynamic Random Access Memory) cells Grant 7,294,543 - Cheng , et al. November 13, 2	2007-11-13
Dram (dynamic Random Access Memory) Cells App 20070257294 - Cheng; Kangguo ; et al.	2007-11-08
SELF-ALIGNED, SILICIDED, TRENCH-BASED DRAM/eDRAM PROCESSES WITH IMPROVED RETENTION App 20070235792 - Kwon; Oh-Jung ; et al.	2007-10-11
Dram (dynamic Random Access Memory) Cells App 20070222020 - Cheng; Kangguo ; et al.	2007-09-27
Self-aligned, silicided, trench-based, DRAM/EDRAM processes with improved retention Grant 7,153,737 - Kwon , et al. December 26, 2	2006-12-26
Self-aligned, Silicided, Trench-based, Dram/edram Processes With Improved Retention App 20060160298 - Kwon; Oh-Jung ; et al.	2006-07-20
Structure and method of fabricating embedded DRAM having a vertical device array and a bordered bitline contact Grant 6,727,540 - Divakaruni , et al. April 27, 2	2004-04-27
Structure And Method Of Fabricating Embedded Dram Having A Vertical Device Array And A Bordered Bitline Contact App 20040036100 - Divakaruni, Ramachandra ; et al.	2004-02-26
Dual Layer Hard Mask For Edram Gate Etch Process App 20030032269 - Dobuzinsky, David Mark ; et al.	2003-02-13
Plasma addressed liquid crystal display with reduced column voltages Grant 5,835,167 - Bongaerts , et al. November 10, 1	1998-11-10
Gas discharge lamps and lasers fabricated by michromachining Grant 5,796,209 - Khan , et al. August 18, 1	1998-08-18
Channel configuration for plasma addressed liquid crystal display Grant 5,696,569 - Bongaerts , et al. December 9, 1	1997-12-09

Company Registrations

SEC

0001381189

Khan Babar Ali

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