Khaderbad; Mrunal Abhijith
Patent Applications and Registrations
Patent applications and USPTO patent grants for Khaderbad; Mrunal Abhijith.The latest application filed is for "contact structures in semiconductor devices".
- Khaderbad; Mrunal Abhijith - Hsinchu City TW
- Khaderbad; Mrunal Abhijith - Hsinchu TW
| Patent | Date |
|---|---|
| Contact Structures in Semiconductor Devices App 20220310800 - Khaderbad; Mrunal Abhijith ; et al. | 2022-09-29 |
| Semiconductor devices including two-dimensional material and methods of fabrication thereof Grant 11,450,666 - Khaderbad , et al. September 20, 2 | 2022-09-20 |
| Low Thermal Budget Dielectric For Semiconductor Devices App 20220293458 - Khaderbad; Mrunal Abhijith ; et al. | 2022-09-15 |
| 2D Channel Transistors with Low Contact Resistance App 20220293736 - Khaderbad; Mrunal Abhijith ; et al. | 2022-09-15 |
| Graphene Wrap-around Contact App 20220285515 - KHADERBAD; Mrunal Abhijith ; et al. | 2022-09-08 |
| Graphene Layer For Low Resistance Contacts And Damascene Interconnects App 20220285221 - Khaderbad; Mrunal Abhijith ; et al. | 2022-09-08 |
| Semiconductor Devices Including Two-dimensional Material And Methods Of Fabrication Thereof App 20220165732 - Khaderbad; Mrunal Abhijith ; et al. | 2022-05-26 |
| Isolation Layers For Stacked Transistor Structures App 20220157936 - KHADERBAD; Mrunal Abhijith ; et al. | 2022-05-19 |
| Self-aligned Barrier For Metal Vias App 20220139773 - WANG; Sung-Li ; et al. | 2022-05-05 |
| Method for making self-aligned barrier for metal vias In-Situ during a metal halide pre-clean and associated interconnect structure Grant 11,227,794 - Wang , et al. January 18, 2 | 2022-01-18 |
| Dual Channel Structure App 20210305372 - Khaderbad; Mrunal Abhijith ; et al. | 2021-09-30 |
| Fin Field Effect Transistor Device Structure And Method For Forming The Same App 20210226057 - CHU; Chia-Hung ; et al. | 2021-07-22 |
| Method For Making Self-aligned Barrier For Metal Vias App 20210193511 - WANG; Sung-Li ; et al. | 2021-06-24 |
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