Kewley; David

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kewley; David.The latest application filed is for "process for improving critical dimension uniformity of integrated circuit arrays".

Company Profile

0.9.10

Kewley; David - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Process for improving critical dimension uniformity of integrated circuit arrays Grant 9,553,082 - Kewley January 24, 2	2017-01-24
Lithography methods, methods for forming patterning tools and patterning tools Grant 9,176,385 - Zhou , et al. November 3, 2	2015-11-03
Methods of processing semiconductor substrates in forming scribe line alignment marks Grant 8,956,976 - Brown , et al. February 17, 2	2015-02-17
Process For Improving Critical Dimension Uniformity Of Integrated Circuit Arrays App 20150035124 - Kewley; David	2015-02-05
Process for improving critical dimension uniformity of integrated circuit arrays Grant 8,889,020 - Kewley November 18, 2	2014-11-18
Methods of Processing Semiconductor Substrates In Forming Scribe Line Alignment Marks App 20140154886 - Brown; William R. ; et al.	2014-06-05
Lithography Methods, Methods For Forming Patterning Tools And Patterning Tools App 20140106280 - Zhou; Jianming ; et al.	2014-04-17
Lithography methods, methods for forming patterning tools and patterning tools Grant 8,609,302 - Zhou , et al. December 17, 2	2013-12-17
Process For Improving Critical Dimension Uniformity Of Integrated Circuit Arrays App 20130105948 - Kewley; David	2013-05-02
Lithography Methods, Methods For Forming Patterning Tools And Patterning Tools App 20130052566 - Zhou; Jianming ; et al.	2013-02-28
Process for improving critical dimension uniformity of integrated circuit arrays Grant 8,334,211 - Kewley December 18, 2	2012-12-18
Methods of Processing Semiconductor Substrates In Forming Scribe Line Alignment Marks App 20110287630 - Brown; William R. ; et al.	2011-11-24
Methods of processing semiconductor substrates in forming scribe line alignment marks Grant 8,003,482 - Brown , et al. August 23, 2	2011-08-23
Methods Of Processing Semiconductor Substrates In Forming Scribe Line Alignment Marks App 20110117719 - Brown; William R. ; et al.	2011-05-19
Process For Improving Critical Dimension Uniformity Of Integrated Circuit Arrays App 20090130852 - Kewley; David	2009-05-21
Process for improving critical dimension uniformity of integrated circuit arrays Grant 7,488,685 - Kewley February 10, 2	2009-02-10
Process for improving critical dimension uniformity of integrated circuit arrays App 20070249170 - Kewley; David	2007-10-25

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