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name:-0.0023829936981201
name:-0.04249095916748
name:-0.00054407119750977
KENNEY, DONALD M. Patent Filings

KENNEY, DONALD M.

Patent Applications and Registrations

Patent applications and USPTO patent grants for KENNEY, DONALD M..The latest application filed is for "substrate plate trench dram cell with lightly doped substrate".

Company Profile
0.37.1
  • KENNEY, DONALD M. - SHELBURNE VT
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Substrate Plate Trench Dram Cell With Lightly Doped Substrate
App 20020005533 - KENNEY, DONALD M. ;   et al.
2002-01-17
Semiconductor trench capacitor cell having a buried strap
Grant 5,719,080 - Kenney February 17, 1
1998-02-17
SOI fabrication method
Grant 5,710,057 - Kenney January 20, 1
1998-01-20
Porous silicon trench and capacitor structures
Grant 5,635,419 - Geiss , et al. June 3, 1
1997-06-03
Stacked devices
Grant 5,583,368 - Kenney December 10, 1
1996-12-10
Semiconductor trench capacitor cell having a buried strap
Grant 5,576,566 - Kenney November 19, 1
1996-11-19
Memory precharge scheme using spare column
Grant 5,532,965 - Kenney July 2, 1
1996-07-02
Sidewall strap
Grant 5,521,118 - Lam , et al. May 28, 1
1996-05-28
Porous silicon trench and capacitor structures
Grant 5,508,542 - Geiss , et al. April 16, 1
1996-04-16
Method of forming borderless contacts using a removable mandrel
Grant 5,466,636 - Cronin , et al. November 14, 1
1995-11-14
Micro mask comprising agglomerated material
Grant 5,466,626 - Armacost , et al. November 14, 1
1995-11-14
Low temperature plasma oxidation process
Grant 5,412,246 - Dobuzinsky , et al. May 2, 1
1995-05-02
Method of making shadow RAM cell having a shallow trench EEPROM
Grant 5,399,516 - Bergendahl , et al. March 21, 1
1995-03-21
Non-conformal and oxidizable etch stops for submicron features
Grant 5,384,281 - Kenney , et al. January 24, 1
1995-01-24
Vertical epitaxial SOI transistor, memory cell and fabrication methods
Grant 5,365,097 - Kenney November 15, 1
1994-11-15
Self-aligned buried strap for trench type DRAM cells
Grant 5,360,758 - Bronner , et al. November 1, 1
1994-11-01
Method of making diffused buried plate trench DRAM cell array
Grant 5,348,905 - Kenney September 20, 1
1994-09-20
Low temperature plasma oxidation process
Grant 5,330,935 - Dobuzinsky , et al. July 19, 1
1994-07-19
Diffused buried plate trench dram cell array
Grant 5,264,716 - Kenney November 23, 1
1993-11-23
Process of making and using micro mask
Grant 5,254,503 - Kenney October 19, 1
1993-10-19
Shadow ram cell having a shallow trench eeprom
Grant 5,196,722 - Bergendahl , et al. March 23, 1
1993-03-23
Two square memory cells
Grant RE33,972 - Garnache , et al. June 23, 1
1992-06-23
Charge amplifying trench memory cell
Grant 4,970,689 - Kenney November 13, 1
1990-11-13
Trench interconnect for CMOS diffusion regions
Grant 4,939,567 - Kenney July 3, 1
1990-07-03
Charge amplifying trench memory cell
Grant 4,914,740 - Kenney April 3, 1
1990-04-03
Process for defining organic sidewall structures
Grant 4,838,991 - Cote , et al. June 13, 1
1989-06-13
Method of making a dynamic ram cell having shared trench storage capacitor with sidewall-defined bridge contacts and gate electrodes
Grant 4,833,094 - Kenney May 23, 1
1989-05-23
Semiconductor trench capacitor cell with merged isolation and node trench construction
Grant 4,801,988 - Kenney January 31, 1
1989-01-31
Dynamic ram cell having shared trench storage capacitor with sidewall-defined bridge contacts and gate electrodes
Grant 4,785,337 - Kenney November 15, 1
1988-11-15
Two square memory cells
Grant 4,769,786 - Garnache , et al. September 6, 1
1988-09-06
High density memory with field shield
Grant 4,751,558 - Kenney June 14, 1
1988-06-14
Sequential shared access lines memory cells
Grant 4,648,073 - Kenney March 3, 1
1987-03-03
Single transistor driver circuit
Grant 4,642,491 - Kenney , et al. February 10, 1
1987-02-10
Dense dynamic memory cell structure and process
Grant 4,511,911 - Kenney April 16, 1
1985-04-16
V-MOS Device with self-aligned multiple electrodes
Grant 4,364,074 - Garnache , et al. December 14, 1
1982-12-14
Method of making a high density V-MOS memory array
Grant 4,326,332 - Kenney April 27, 1
1982-04-27
Method for providing self-aligned conductor in a V-groove device
Grant 4,295,924 - Garnache , et al. October 20, 1
1981-10-20
Apparatus For Diffusion Limited Mass Transport
Grant 3,805,736 - Foehring , et al. April 23, 1
1974-04-23

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