loadpatents
name:-0.39234399795532
name:-0.040812015533447
name:-0.0063550472259521
Kengeri; Subramani Patent Filings

Kengeri; Subramani

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kengeri; Subramani.The latest application filed is for "semiconductor device with transistor local interconnects".

Company Profile
6.46.33
  • Kengeri; Subramani - San Jose CA
  • - San Jose CA US
  • Kengeri; Subramani - Cupertino CA
  • Kengeri; Subramani - Norwood MA
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Semiconductor device with transistor local interconnects
Grant 11,444,031 - Rashed , et al. September 13, 2
2022-09-13
Semiconductor Device With Transistor Local Interconnects
App 20210013150 - Rashed; Mahbub ;   et al.
2021-01-14
Semiconductor device with transistor local interconnects
Grant 10,833,018 - Rashed , et al. November 10, 2
2020-11-10
Semiconductor Device With Transistor Local Interconnects
App 20190326219 - Rashed; Mahbub ;   et al.
2019-10-24
Circuit having capacitor coupled with memory element
Grant 9,484,067 - Shaw , et al. November 1, 2
2016-11-01
Semiconductor Device With Transistor Local Interconnects
App 20160268204 - Rashed; Mahbub ;   et al.
2016-09-15
Semiconductor device with transistor local interconnects
Grant 9,355,910 - Rashed , et al. May 31, 2
2016-05-31
Methods of using a trench salicide routing layer
Grant 9,196,548 - Rashed , et al. November 24, 2
2015-11-24
Forming Gate Tie Between Abutting Cells And Resulting Device
App 20150311122 - RASHED; Mahbub ;   et al.
2015-10-29
Middle-of-the-line constructs using diffusion contact structures
Grant 9,142,513 - Rashed , et al. September 22, 2
2015-09-22
Middle-of-the-line Constructs Using Diffusion Contact Structures
App 20150187702 - RASHED; Mahbub ;   et al.
2015-07-02
Measuring electrical resistance
Grant 9,053,780 - Hsu , et al. June 9, 2
2015-06-09
Middle-of-the-line constructs using diffusion contact structures
Grant 9,006,100 - Rashed , et al. April 14, 2
2015-04-14
Circuit Having Capacitor Coupled With Memory Element
App 20140339618 - SHAW; Ching-Hao ;   et al.
2014-11-20
Providing capacitors to improve radiation hardening in memory elements
Grant 8,824,226 - Shaw , et al. September 2, 2
2014-09-02
Methods Of Using A Trench Salicide Routing Layer
App 20140183638 - RASHED; Mahbub ;   et al.
2014-07-03
Providing timing-closed FinFET designs from planar designs
Grant 8,689,154 - Rashed , et al. April 1, 2
2014-04-01
Middle-of-the-line Constructs Using Diffusion Contact Structures
App 20140042641 - Rashed; Mahbub ;   et al.
2014-02-13
Memory building blocks and memory design using automatic design tools
Grant 8,631,365 - Kengeri , et al. January 14, 2
2014-01-14
Semiconductor Devices Formed On A Continuous Active Region With An Isolating Conductive Structure Positioned Between Such Semiconductor Devices, And Methods Of Making Same
App 20140001563 - Rashed; Mahbub ;   et al.
2014-01-02
Semiconductor devices formed on a continuous active region with an isolating conductive structure positioned between such semiconductor devices, and methods of making same
Grant 08618607 -
2013-12-31
Semiconductor devices formed on a continuous active region with an isolating conductive structure positioned between such semiconductor devices, and methods of making same
Grant 8,618,607 - Rashed , et al. December 31, 2
2013-12-31
Semiconductor device having contact layer providing electrical connections
Grant 8,598,633 - Tarabbia , et al. December 3, 2
2013-12-03
Semiconductor device with transistor local interconnects
Grant 8,581,348 - Rashed , et al. November 12, 2
2013-11-12
Providing Timing-closed Finfet Designs From Planar Designs
App 20130275935 - Rashed; Mahbub ;   et al.
2013-10-17
Memory circuits, systems, and method of interleavng accesses thereof
Grant 8,547,779 - Hsu , et al. October 1, 2
2013-10-01
Measuring Electrical Resistance
App 20130223129 - HSU; Kuoyuan ;   et al.
2013-08-29
Semiconductor Device
App 20130181289 - Tarabbia; Marc ;   et al.
2013-07-18
Semiconductor Device With Transistor Local Interconnects
App 20130146986 - Rashed; Mahbub ;   et al.
2013-06-13
Semiconductor Device With Transistor Local Interconnects
App 20130146982 - Rashed; Mahbub ;   et al.
2013-06-13
Measuring electrical resistance
Grant 8,432,759 - Hsu , et al. April 30, 2
2013-04-30
Memory Building Blocks And Memory Design Using Automatic Design Tools
App 20120213013 - KENGERI; Subramani ;   et al.
2012-08-23
Memory Circuits, Systems, And Method Of Interleavng Accesses Thereof
App 20120176856 - HSU; Kuoyuan ;   et al.
2012-07-12
No-disturb bit line write for improving speed of eDRAM
Grant 8,208,329 - Kengeri , et al. June 26, 2
2012-06-26
Memory building blocks and memory design using automatic design tools
Grant 8,185,851 - Kengeri , et al. May 22, 2
2012-05-22
Memory circuits, systems, and method of interleaving accesses thereof
Grant 8,164,974 - Hsu , et al. April 24, 2
2012-04-24
No-Disturb Bit Line Write for Improving Speed of eDRAM
App 20110199835 - Kengeri; Subramani ;   et al.
2011-08-18
No-disturb bit line write for improving speed of eDRAM
Grant 7,952,946 - Kengeri , et al. May 31, 2
2011-05-31
Write assist circuit for improving write margins of SRAM cells
Grant 7,898,875 - Tao , et al. March 1, 2
2011-03-01
Memory Building Blocks And Memory Design Using Automatic Design Tools
App 20110041109 - Kengeri; Subramani ;   et al.
2011-02-17
Measuring Electrical Resistance
App 20100329055 - HSU; Kuoyuan ;   et al.
2010-12-30
Providing Capacitors To Improve Radiation Hardening In Memory Elements
App 20100254069 - SHAW; Ching-Hao ;   et al.
2010-10-07
Memory Circuits, Systems, And Method Of Interleaving Accesses Thereof
App 20100214857 - Hsu; Kuoyuan ;   et al.
2010-08-26
WAK devices in SRAM cells for improving VCCMIN
Grant 7,733,687 - Kengeri , et al. June 8, 2
2010-06-08
Write Assist Circuit for Improving Write Margins of SRAM Cells
App 20090285010 - Tao; Derek C. ;   et al.
2009-11-19
SRAM device with a power saving module controlled by word line signals
Grant 7,606,061 - Kengeri , et al. October 20, 2
2009-10-20
WAK Devices in SRAM Cells for Improving VCCMIN
App 20090207675 - Kengeri; Subramani ;   et al.
2009-08-20
No-Disturb Bit Line Write for Improving Speed of eDRAM
App 20090141568 - Kengeri; Subramani ;   et al.
2009-06-04
SRAM Device with a Power Saving Module Controlled by Word Line Signals
App 20090040858 - Kengeri; Subramani ;   et al.
2009-02-12
Method and system for accelerated detection of weak bits in an SRAM memory device
Grant 7,298,659 - Kengeri , et al. November 20, 2
2007-11-20
Multi-port memory utilizing an array of single-port memory cells
Grant 7,251,186 - Kengeri , et al. July 31, 2
2007-07-31
Error checking and correcting for content addressable memories (CAMs)
Grant 7,200,793 - Kengeri , et al. April 3, 2
2007-04-03
Split-bank architecture for high performance SDRAMs
Grant 6,459,647 - Kengeri October 1, 2
2002-10-01
2T dual-port DRAM in a pure logic process with non-destructive read capability
Grant 6,452,834 - Kengeri September 17, 2
2002-09-17
High performance multi-bank compact synchronous DRAM architecture
Grant 6,442,098 - Kengeri August 27, 2
2002-08-27
Compact load-less static ternary CAM
Grant 6,411,538 - Kengeri June 25, 2
2002-06-25
Charge shared match line differential generation for CAM
Grant 6,343,029 - Kengeri , et al. January 29, 2
2002-01-29
Structure and method of an encoded ternary content addressable memory (CAM) cell for low-power compare operation
Grant 6,288,922 - Wong , et al. September 11, 2
2001-09-11
Interleaved stitch using segmented word lines
Grant 6,141,236 - Kengeri October 31, 2
2000-10-31
Highly integrated low voltage SRAM array with low resistance Vss lines
Grant 5,831,315 - Kengeri , et al. November 3, 1
1998-11-03
Apparatus and method for power reduction in dRAM units
Grant 5,629,646 - Menezes , et al. May 13, 1
1997-05-13

uspto.report is an independent third-party trademark research tool that is not affiliated, endorsed, or sponsored by the United States Patent and Trademark Office (USPTO) or any other governmental organization. The information provided by uspto.report is based on publicly available data at the time of writing and is intended for informational purposes only.

While we strive to provide accurate and up-to-date information, we do not guarantee the accuracy, completeness, reliability, or suitability of the information displayed on this site. The use of this site is at your own risk. Any reliance you place on such information is therefore strictly at your own risk.

All official trademark data, including owner information, should be verified by visiting the official USPTO website at www.uspto.gov. This site is not intended to replace professional legal advice and should not be used as a substitute for consulting with a legal professional who is knowledgeable about trademark law.

© 2024 USPTO.report | Privacy Policy | Resources | RSS Feed of Trademarks | Trademark Filings Twitter Feed