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Method, system, and product for deferred merge based method for graph based analysis pessimism reduction Grant 11,188,696 - Dhuria , et al. November 30, 2 | 2021-11-30 |
Methods, systems, and computer program product for characterizing timing behavior of an electronic design with a derived current waveform Grant 11,023,640 - Keller , et al. June 1, 2 | 2021-06-01 |
Methods, systems, and computer program product for characterizing an electronic design with a susceptibility window Grant 11,023,636 - Keller , et al. June 1, 2 | 2021-06-01 |
Analyzing clock jitter using delay calculation engine Grant 10,963,610 - Keller , et al. March 30, 2 | 2021-03-30 |
Characterizing electronic component parameters including on-chip variations and moments Grant 10,789,406 - Raja , et al. September 29, 2 | 2020-09-29 |
Method and apparatus for yield calculation using statistical timing data that accounts for path and stage delay correlation Grant 10,430,536 - Keller , et al. O | 2019-10-01 |
Delay propagation for multiple logic cells using correlation and coskewness of delays and slew rates in an integrated circuit design Grant 10,275,554 - Chetin , et al. | 2019-04-30 |
Pseudo-inverter configuration for signal electromigration analysis Grant 10,192,012 - Wehbeh , et al. Ja | 2019-01-29 |
Systems and methods for statistical static timing analysis Grant 10,185,795 - Keller , et al. Ja | 2019-01-22 |
Systems and methods for statistical static timing analysis Grant 10,073,934 - Keller , et al. September 11, 2 | 2018-09-11 |
System and method for accurate modeling of back-miller effect in timing analysis of digital circuits Grant 9,928,324 - Keller , et al. March 27, 2 | 2018-03-27 |
Method and system for timing analysis with adaptive timing window optimization for determining signal integrity impact Grant 9,881,123 - Goyal , et al. January 30, 2 | 2018-01-30 |
Methods, systems, and articles of manufacture for enhancing timing analyses with reduced timing libraries for electronic designs Grant 9,710,593 - Keller , et al. July 18, 2 | 2017-07-18 |
Using waveform propagation for accurate delay calculation Grant 9,582,626 - Keller , et al. February 28, 2 | 2017-02-28 |
View data sharing for efficient multi-mode multi-corner timing analysis Grant 9,384,310 - Keller , et al. July 5, 2 | 2016-07-05 |
Static timing analysis of integrated circuit designs with flexible noise and delay models of circuit stages Grant 9,129,078 - Keller , et al. September 8, 2 | 2015-09-08 |
Lumped aggressor model for signal integrity timing analysis Grant 9,003,342 - Keller , et al. April 7, 2 | 2015-04-07 |
Static timing analysis methods for integrated circuit designs using a multi-CCC current source model Grant 8,966,421 - Kariat , et al. February 24, 2 | 2015-02-24 |
Method and apparatus for comprehension of common path pessimism during timing model extraction Grant 8,938,703 - Saurabh , et al. January 20, 2 | 2015-01-20 |
Constructing equivalent waveform models for static timing analysis of integrated circuit designs Grant 8,924,905 - Keller , et al. December 30, 2 | 2014-12-30 |
Constructing equivalent waveform models for static timing analysis of integrated circuit designs Grant 08924905 - | 2014-12-30 |
Waveform based variational static timing analysis Grant 8,782,583 - Tiwary , et al. July 15, 2 | 2014-07-15 |
Generating an equivalent waveform model in static timing analysis Grant 8,726,211 - Phillips , et al. May 13, 2 | 2014-05-13 |
Generating An Equivalent Waveform Model In Static Timing Analysis App 20140096099 - Phillips; Joel R. ;   et al. | 2014-04-03 |
Methods, systems, and apparatus for timing and signal integrity analysis of integrated circuits with semiconductor process variations Grant 8,631,369 - Kariat , et al. January 14, 2 | 2014-01-14 |
Methods for compact modeling of circuit stages for static timing analysis of integrated circuit designs Grant 8,615,725 - Keller , et al. December 24, 2 | 2013-12-24 |
Equivalent waveform model for static timing analysis of integrated circuit designs Grant 8,601,420 - Keller , et al. December 3, 2 | 2013-12-03 |
Flexible noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs Grant 8,595,669 - Keller , et al. November 26, 2 | 2013-11-26 |
Concurrent noise and delay modeling of circuit stages for static timing analysis of integrated circuit designs Grant 8,543,954 - Keller , et al. September 24, 2 | 2013-09-24 |
Multi-CCC current source models and static timing analysis methods for integrated circuit designs Grant 8,533,644 - Kariat , et al. September 10, 2 | 2013-09-10 |
Sensitivity and static timing analysis for integrated circuit designs using a multi-CCC current source model Grant 8,516,420 - Kariat , et al. August 20, 2 | 2013-08-20 |
Methods and apparatus for waveform based variational static timing analysis Grant 8,375,343 - Tiwary , et al. February 12, 2 | 2013-02-12 |
Methods and apparatus for waveform based variational static timing analysis Grant 8,341,572 - Tiwary , et al. December 25, 2 | 2012-12-25 |
Compact modeling of circuit stages for static timing analysis of integrated circuit designs Grant 8,302,046 - Keller , et al. October 30, 2 | 2012-10-30 |
Methods and apparatus for waveform based variational static timing analysis Grant 8,245,165 - Tiwary , et al. August 14, 2 | 2012-08-14 |
Method and apparatus for thermal analysis Grant 8,104,006 - Kariat , et al. January 24, 2 | 2012-01-24 |
Receiver dependent selection of a worst-case timing event for static timing analysis Grant 7,983,891 - Keller July 19, 2 | 2011-07-19 |
Timing and signal integrity analysis of integrated circuits with semiconductor process variations Grant 7,882,471 - Kariat , et al. February 1, 2 | 2011-02-01 |
Method and system for crosstalk analysis Grant 7,761,826 - Thanvantri , et al. July 20, 2 | 2010-07-20 |
Method And Apparatus For Thermal Analysis App 20090199140 - Kariat; Vinod ;   et al. | 2009-08-06 |
System, method and computer program product for handling small aggressors in signal integrity analysis Grant 7,562,323 - Bai , et al. July 14, 2 | 2009-07-14 |
Method and system or generating a current source model of a gate Grant 7,464,349 - Keller , et al. December 9, 2 | 2008-12-09 |
Robust calculation of crosstalk delay change in integrated circuit design Grant 7,359,843 - Keller , et al. April 15, 2 | 2008-04-15 |