Kelkar; Amit S.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kelkar; Amit S..The latest application filed is for "three-dimensional chip-to-wafer integration".

Company Profile

0.16.13

Kelkar; Amit S. - Flower Mound TX
Kelkar; Amit S. - Irving TX
Kelkar; Amit S. - Castle Rock CO

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Warpage compensation metal for wafer level packaging technology Grant 10,134,689 - Sridharan , et al. November 20, 2	2018-11-20
Three-dimensional chip-to-wafer integration Grant 10,032,749 - Kelkar , et al. July 24, 2	2018-07-24
Fan-out and heterogeneous packaging of electronic components Grant 9,704,809 - Tran , et al. July 11, 2	2017-07-11
Technique for wafer-level processing of QFN packages Grant 9,472,451 - Khandekar , et al. October 18, 2	2016-10-18
Bonded stacked wafers and methods of electroplating bonded stacked wafers Grant 9,331,048 - Zou , et al. May 3, 2	2016-05-03
Wafer-level passive device integration Grant 9,324,687 - Kelkar , et al. April 26, 2	2016-04-26
Three-dimensional Chip-to-wafer Integration App 20160071826 - Kelkar; Amit S. ; et al.	2016-03-10
Wafer-level package device having high-standoff peripheral solder bumps Grant 9,219,043 - Kelkar , et al. December 22, 2	2015-12-22
Method for varied topographic MEMS cap process Grant 9,040,386 - Ying , et al. May 26, 2	2015-05-26
Bonded Stacked Wafers And Methods Of Electroplating Bonded Stacked Wafers App 20150132891 - Zou; Quanbo ; et al.	2015-05-14
Wafer-level thin chip integration Grant 9,000,587 - Kelkar , et al. April 7, 2	2015-04-07
Bonded stacked wafers and methods of electroplating bonded stacked wafers Grant 8,970,043 - Zou , et al. March 3, 2	2015-03-03
Method For Varied Topographic Mems Cap Process App 20150028455 - Ying; Xuejun ; et al.	2015-01-29
Technique For Wafer-level Processing Of Qfn Packages App 20150028475 - Khandekar; Viren ; et al.	2015-01-29
Semiconductor device having a buffer material and stiffener Grant 8,878,350 - Sridharan , et al. November 4, 2	2014-11-04
Semiconductor Device Having A Buffer Material And Stiffener App 20140306337 - Sridharan; Vivek S. ; et al.	2014-10-16
Wafer-level Package Device Having High-standoff Peripheral Solder Bumps App 20140264845 - Kelkar; Amit S. ; et al.	2014-09-18
Fan-out And Heterogeneous Packaging Of Electronic Components App 20140252655 - Tran; Khanh ; et al.	2014-09-11
Preventing Contact Stiction In Micro Relays App 20120194306 - Sridhar; Uppili ; et al.	2012-08-02
Bonded Stacked Wafers And Methods Of Electroplating Bonded Stacked Wafers App 20120193808 - Zou; Quanbo ; et al.	2012-08-02
Thermal processing of silicon wafers Grant 8,124,916 - Kelkar , et al. February 28, 2	2012-02-28
Thermal Processing of Silicon Wafers App 20080254599 - Kelkar; Amit S. ; et al.	2008-10-16
Method of forming pre-metal dielectric film on a semiconductor substrate including first layer of undoped oxide of high ozone:TEOS volume ratio and second layer of low ozone doped BPSG Grant RE40,507 - Kelkar , et al. September 16, 2	2008-09-16
Method of forming shallow trench isolation structure in a semiconductor device Grant 6,828,212 - Barry , et al. December 7, 2	2004-12-07
Method of forming shallow trench isolation structure in a semiconductor device App 20040087104 - Barry, Timothy M. ; et al.	2004-05-06
Method for fabrication of a high capacitance interpoly dielectric Grant 6,709,990 - Good , et al. March 23, 2	2004-03-23
Method for fabrication of a high capacitance interpoly dielectric App 20030045123 - Good, Mark A. ; et al.	2003-03-06
Method for fabrication of a high capacitance interpoly dielectric App 20020142570 - Good, Mark A. ; et al.	2002-10-03

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