| Patent | Date |
|---|
Bit-plane encoder and decoder
Grant 11,457,232 - Keinert , et al. September 27, 2 | 2022-09-27 |
Transform coefficients encoder and decoder
Grant 11,438,617 - Keinert , et al. September 6, 2 | 2022-09-06 |
Localization Of Elements In The Space
App 20210357622 - KEINERT; Joachim ; et al. | 2021-11-18 |
Localization Of Elements In The Space
App 20210358163 - KEINERT; Joachim ; et al. | 2021-11-18 |
Image compression technique
Grant 11,006,133 - Keinert , et al. May 11, 2 | 2021-05-11 |
Integrated circuit design changes using through-silicon vias
Grant 10,956,644 - Barowski , et al. March 23, 2 | 2021-03-23 |
Apparatus, Method And Computer Program For Rendering A Visual Scene
App 20210082185 - ZIEGLER; Matthias ; et al. | 2021-03-18 |
Concept for determining a confidence/uncertainty measure for disparity measurement
Grant 10,949,989 - Op Het Veld , et al. March 16, 2 | 2021-03-16 |
Apparatus and method for encoding or decoding using a subband dependent prediction adaptation for GCLI entropy coding
Grant 10,944,972 - Keinert , et al. March 9, 2 | 2021-03-09 |
Transform block coding
Grant 10,887,610 - Keinert , et al. January 5, 2 | 2021-01-05 |
Bit-plane Coding
App 20200404307 - KEINERT; Joachim ; et al. | 2020-12-24 |
Bit-plane Coding
App 20200374539 - KEINERT; Joachim ; et al. | 2020-11-26 |
Apparatus for providing calibration data, camera system and method for obtaining calibration data
Grant 10,803,624 - Ziegler , et al. October 13, 2 | 2020-10-13 |
Bit-plane coding
Grant 10,743,014 - Keinert , et al. A | 2020-08-11 |
Compression of a raw image
Grant 10,721,470 - Foessel , et al. | 2020-07-21 |
Layouting of interconnect lines in integrated circuits
Grant 10,579,773 - Keinert , et al. | 2020-03-03 |
Apparatus For Providing Calibration Data, Camera System And Method For Obtaining Calibration Data
App 20200027243 - ZIEGLER; Matthias ; et al. | 2020-01-23 |
Layout of large block synthesis blocks in integrated circuits
Grant 10,534,884 - Barowski , et al. Ja | 2020-01-14 |
Compression Of A Raw Image
App 20200014923 - FOESSEL; Siegfried ; et al. | 2020-01-09 |
Light-field camera
Grant 10,511,787 - Zilly , et al. Dec | 2019-12-17 |
Layout Of Large Block Synthesis Blocks In Integrated Circuits
App 20190294739 - Barowski; Harry ; et al. | 2019-09-26 |
Apparatus And Method For Encoding Or Decoding Using A Subband Dependent Prediction Adaptation For Gcli Entropy Coding
App 20190289295 - KEINERT; Joachim ; et al. | 2019-09-19 |
Layouting of interconnect lines in integrated circuits
Grant 10,417,377 - Keinert , et al. Sept | 2019-09-17 |
Layout of large block synthesis blocks in integrated circuits
Grant 10,417,366 - Barowski , et al. Sept | 2019-09-17 |
Concept for determining a confidence/uncertainty measure for disparity measurement
App 20190244380 - OP HET VELD; Ronald ; et al. | 2019-08-08 |
Layout of large block synthesis blocks in integrated circuits
Grant 10,366,191 - Barowski , et al. July 30, 2 | 2019-07-30 |
Transform Block Coding
App 20190222853 - KEINERT; Joachim ; et al. | 2019-07-18 |
Image Compression Technique
App 20190222854 - KEINERT; Joachim ; et al. | 2019-07-18 |
Integrated Circuit Design Changes Using Through-silicon Vias
App 20190220570 - Barowski; Harry ; et al. | 2019-07-18 |
Layout of large block synthesis blocks in integrated circuits
Grant 10,242,140 - Barowski , et al. | 2019-03-26 |
Layout of large block synthesis blocks in integrated circuits
Grant 10,235,487 - Barowski , et al. | 2019-03-19 |
Placement clustering-based white space reservation
Grant 10,223,489 - Barowski , et al. | 2019-03-05 |
Integrated circuit design changes using through-silicon vias
Grant 10,223,491 - Barowski , et al. | 2019-03-05 |
Layout Of Large Block Synthesis Blocks In Integrated Circuits
App 20190065636 - Barowski; Harry ; et al. | 2019-02-28 |
Layout Of Large Block Synthesis Blocks In Integrated Circuits
App 20190065635 - Barowski; Harry ; et al. | 2019-02-28 |
Bit-plane Coding
App 20190045206 - KEINERT; Joachim ; et al. | 2019-02-07 |
Decoder, Encoder And Methods For Coding A Sequence Of Portions Of Media From/into A Data Stream Using An Unary Code
App 20190014321 - KEINERT; Joachim ; et al. | 2019-01-10 |
Area sharing between multiple large block synthesis (LBS) blocks
Grant 10,169,519 - Barowski , et al. J | 2019-01-01 |
Layouting Of Interconnect Lines In Integrated Circuits
App 20180285513 - Keinert; Joachim ; et al. | 2018-10-04 |
Layouting Of Interconnect Lines In Integrated Circuits
App 20180285514 - Keinert; Joachim ; et al. | 2018-10-04 |
Area Sharing Between Multiple Large Block Synthesis (lbs) Blocks
App 20180189439 - Barowski; Harry ; et al. | 2018-07-05 |
Layouting of interconnect lines in integrated circuits
Grant 10,013,521 - Keinert , et al. July 3, 2 | 2018-07-03 |
Placement Clustering-based White Space Reservation
App 20180150584 - Barowski; Harry ; et al. | 2018-05-31 |
Area sharing between multiple large block synthesis (LBS) blocks
Grant 9,946,830 - Barowski , et al. April 17, 2 | 2018-04-17 |
Layout Of Large Block Synthesis Blocks In Integrated Circuits
App 20180101626 - Barowski; Harry ; et al. | 2018-04-12 |
Layout Of Large Block Synthesis Blocks In Integrated Circuits
App 20180101625 - Barowski; Harry ; et al. | 2018-04-12 |
Layout of large block synthesis blocks in integrated circuits
Grant 9,928,329 - Barowski , et al. March 27, 2 | 2018-03-27 |
Enabling an incremental sign-off process using design data
Grant 9,922,154 - Anderson , et al. March 20, 2 | 2018-03-20 |
Layout of large block synthesis blocks in integrated circuits
Grant 9,910,948 - Barowski , et al. March 6, 2 | 2018-03-06 |
Area Sharing Between Multiple Large Block Synthesis (lbs) Blocks
App 20170351798 - Barowski; Harry ; et al. | 2017-12-07 |
Enabling An Incremental Sign-off Process Using Design Data
App 20170337314 - Anderson; Hans-Werner ; et al. | 2017-11-23 |
Write-bitline control in multicore SRAM arrays
Grant 9,761,304 - Keinert , et al. September 12, 2 | 2017-09-12 |
Layout Of Large Block Synthesis Blocks In Integrated Circuits
App 20170212970 - Barowski; Harry ; et al. | 2017-07-27 |
Layout Of Large Block Synthesis Blocks In Integrated Circuits
App 20170212969 - Barowski; Harry ; et al. | 2017-07-27 |
De-coupling capacitance placement
Grant 9,684,759 - Barowski , et al. June 20, 2 | 2017-06-20 |
De-coupling capacitance placement
Grant 9,679,099 - Barowski , et al. June 13, 2 | 2017-06-13 |
Integrated Circuit Design Changes Using Through-silicon Vias
App 20170154148 - Barowski; Harry ; et al. | 2017-06-01 |
Layouting Of Interconnect Lines In Integrated Circuits
App 20170140088 - Keinert; Joachim ; et al. | 2017-05-18 |
Through-silicon via access device for integrated circuits
Grant 9,633,928 - Barowski , et al. April 25, 2 | 2017-04-25 |
Integrated circuit design changes using through-silicon vias
Grant 9,569,580 - Barowski , et al. February 14, 2 | 2017-02-14 |
De-coupling Capacitance Placement
App 20170004248 - Barowski; Harry ; et al. | 2017-01-05 |
De-coupling Capacitance Placement
App 20170004239 - Barowski; Harry ; et al. | 2017-01-05 |
Integrated circuit design changes using through-silicon vias
Grant 9,501,603 - Barowski , et al. November 22, 2 | 2016-11-22 |
Light-field Camera
App 20160248987 - ZILLY; Frederik ; et al. | 2016-08-25 |
Through-silicon Via Access Device For Integrated Circuits
App 20160071786 - Barowski; Harry ; et al. | 2016-03-10 |
Integrated Circuit Design Changes Using Through-silicon Vias
App 20160070842 - Barowski; Harry ; et al. | 2016-03-10 |
Integrated Circuit Design Changes Using Through-silicon Vias
App 20160070840 - Barowski; Harry ; et al. | 2016-03-10 |
Through-silicon Via Access Device For Integrated Circuits
App 20160071783 - Barowski; Harry ; et al. | 2016-03-10 |
Charge recycling between power domains of integrated circuits
Grant 8,984,314 - Barowski , et al. March 17, 2 | 2015-03-17 |
Charge recycling between power domains of integrated circuits
Grant 8,972,758 - Barowski , et al. March 3, 2 | 2015-03-03 |
Camera system and method for generating high-quality HDR images or videos
Grant 8,811,811 - Wetzel , et al. August 19, 2 | 2014-08-19 |
Circuit macro placement using macro aspect ratio based on ports
Grant 8,762,919 - Keinert , et al. June 24, 2 | 2014-06-24 |
Charge Recycling Between Power Domains of Integrated Circuits
App 20140082386 - Barowski; Harry ; et al. | 2014-03-20 |
Providing secondary power pins in integrated circuit design
Grant 8,495,547 - Keinert , et al. July 23, 2 | 2013-07-23 |
Shaping ports in integrated circuit design
Grant 8,495,551 - Keinert , et al. July 23, 2 | 2013-07-23 |
Performing reliability analysis of signal wires
Grant 8,463,571 - Abbaspour , et al. June 11, 2 | 2013-06-11 |
Charge Recycling Between Power Domains of Integrated Circuits
App 20130138978 - Barowski; Harry ; et al. | 2013-05-30 |
Post timing layout modification for performance
Grant 8,448,124 - Fassnacht , et al. May 21, 2 | 2013-05-21 |
Method, electronic design automation tool, computer program product, and data processing program for creating a layout for design representation of an electronic circuit and corresponding port for an electronic circuit
Grant 8,429,584 - Keinert , et al. April 23, 2 | 2013-04-23 |
Using port obscurity factors to improve routing
Grant 8,418,110 - Keinert , et al. April 9, 2 | 2013-04-09 |
Post Timing Layout Modification For Performance
App 20130074025 - Fassnacht; Uwe ; et al. | 2013-03-21 |
Automatic positioning of gate array circuits in an integrated circuit design
Grant 8,276,105 - Keinert , et al. September 25, 2 | 2012-09-25 |
Performing Reliability Analysis Of Signal Wires
App 20120123725 - Abbaspour; Soroush ; et al. | 2012-05-17 |
Using Port Obscurity Factors to Improve Routing
App 20120060139 - Keinert; Joachim ; et al. | 2012-03-08 |
Logic difference synthesis
Grant 8,122,400 - Hopkins , et al. February 21, 2 | 2012-02-21 |
Circuit Macro Placement Using Macro Aspect Ratio Based on Ports
App 20110289468 - Keinert; Joachim ; et al. | 2011-11-24 |
Method and system for electromigration analysis on signal wiring
Grant 7,971,171 - Keinert , et al. June 28, 2 | 2011-06-28 |
Shaping Ports in Integrated Circuit Design
App 20110154283 - Keinert; Joachim ; et al. | 2011-06-23 |
Port assignment in hierarchical designs by abstracting macro logic
Grant 7,962,877 - Keinert , et al. June 14, 2 | 2011-06-14 |
Method, Electronic Design Automation Tool, Computer Program Product, and Data Processing Program for Creating a Layout for Design Representation of an Electronic Circuit and Corresponding Port for an Electronic Circuit
App 20110113395 - Keinert; Joachim ; et al. | 2011-05-12 |
Method and System for Providing Secondary Power Pins in Integrated Circuit Design
App 20110113398 - Keinert; Joachim ; et al. | 2011-05-12 |
Automatic Positioning of Gate Array Circuits in an Integrated Circuit Design
App 20110072407 - Keinert; Joachim ; et al. | 2011-03-24 |
Logic Difference Synthesis
App 20110004857 - Hopkins; Jeremy T. ; et al. | 2011-01-06 |
Port Assignment In Hierarchical Designs By Abstracting Macro Logic
App 20100037198 - Keinert; Joachim ; et al. | 2010-02-11 |
Method and System for Electromigration Analysis on Signal Wiring
App 20090013290 - Keinert; Joachim ; et al. | 2009-01-08 |
Method and device for automated layer generation for double-gate FinFET designs
Grant 7,315,994 - Aller , et al. January 1, 2 | 2008-01-01 |
Automatic Addition Of Power Connections To Chip Power
App 20060085778 - Keinert; Joachim ; et al. | 2006-04-20 |
Method and device for automated layer generation for double-gate FinFET designs
App 20050136582 - Aller, Ingo ; et al. | 2005-06-23 |
Multi-height FinFETS
Grant 6,909,147 - Aller , et al. June 21, 2 | 2005-06-21 |
Multi-height Finfets
App 20040222477 - Aller, Ingo ; et al. | 2004-11-11 |
Method and apparatus for enabling parallel layout checking of designing VLSI-chips
Grant 6,237,128 - Folberth , et al. May 22, 2 | 2001-05-22 |
Dishing avoidance in wide soft metal wires
Grant 6,094,812 - English , et al. August 1, 2 | 2000-08-01 |
Phase splitter with latch
Grant 4,614,885 - Brosch , et al. September 30, 1 | 1986-09-30 |
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