Ke; Chung-Hu

Patent Applications and Registrations

Patent applications and USPTO patent grants for Ke; Chung-Hu.The latest application filed is for "cmos devices with schottky source and drain regions".

Company Profile

0.29.35

Ke; Chung-Hu - Taipei TW

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
CMOS devices with Schottky source and drain regions Grant 9,673,105 - Ko , et al. June 6, 2	2017-06-06
CMOS Devices with Schottky Source and Drain Regions App 20140094008 - Ko; Chih-Hsin ; et al.	2014-04-03
MOS devices having elevated source/drain regions Grant 8,569,837 - Ko , et al. October 29, 2	2013-10-29
CMOS devices with Schottky source and drain regions Grant 8,426,298 - Ko , et al. April 23, 2	2013-04-23
Semiconductor device and a method of fabricating the device Grant 8,154,107 - Ke , et al. April 10, 2	2012-04-10
Isolation spacer for thin SOI devices Grant 8,084,305 - Ko , et al. December 27, 2	2011-12-27
Dual metal silicides for lowering contact resistance Grant 8,039,284 - Ke , et al. October 18, 2	2011-10-18
Contact barrier structure and manufacturing methods Grant 8,030,210 - Wang , et al. October 4, 2	2011-10-04
CMOS Devices with Schottky Source and Drain Regions App 20110223727 - Ko; Chih-Hsin ; et al.	2011-09-15
Metal stress memorization technology Grant 7,985,652 - Ke , et al. July 26, 2	2011-07-26
Semiconductor structure having selective silicide-induced stress and a method of producing same Grant 7,875,959 - Ke , et al. January 25, 2	2011-01-25
BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture Grant 7,803,718 - Ko , et al. September 28, 2	2010-09-28
Contact Barrier Structure and Manufacturing Methods App 20100167485 - Wang; Ching-Ya ; et al.	2010-07-01
Shallow trench isolation structure for semiconductor device Grant 7,745,904 - Ko , et al. June 29, 2	2010-06-29
Hybrid Schottky source-drain CMOS for high mobility and low barrier Grant 7,737,532 - Ke , et al. June 15, 2	2010-06-15
Contact barrier structure and manufacturing methods Grant 7,709,903 - Wang , et al. May 4, 2	2010-05-04
Isolation spacer for thin SOI devices Grant 7,582,934 - Ko , et al. September 1, 2	2009-09-01
Transistors with stressed channels Grant 7,569,896 - Ko , et al. August 4, 2	2009-08-04
System and method for forming a semiconductor device source/drain contact Grant 7,538,398 - Ke , et al. May 26, 2	2009-05-26
BiCMOS Performance Enhancement by Mechanical Uniaxial Strain and Methods of Manufacture App 20090117695 - Ko; Chih-Hsin ; et al.	2009-05-07
MOS transistors with selectively strained channels Grant 7,511,348 - Ko , et al. March 31, 2	2009-03-31
Metal Stress Memorization Technology App 20090075442 - Ke; Chung-Hu ; et al.	2009-03-19
System and Method for Forming a Semiconductor Device Source/Drain Contact App 20080315321 - Ke; Chung-Hu ; et al.	2008-12-25
BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture Grant 7,466,008 - Ko , et al. December 16, 2	2008-12-16
Transistor mobility improvement by adjusting stress in shallow trench isolation Grant 7,465,620 - Ko , et al. December 16, 2	2008-12-16
Contact barrier structure and manufacturing methods App 20080290421 - Wang; Ching-Ya ; et al.	2008-11-27
MOS devices having elevated source/drain regions App 20080277735 - Ko; Chih-Hsin ; et al.	2008-11-13
BiCMOS performance enhancement by mechanical uniaxial strain and methods of manufacture App 20080224227 - Ko; Chih-Hsin ; et al.	2008-09-18
MOS transistors with selectively strained channels App 20080224225 - Ko; Chih-Hsin ; et al.	2008-09-18
CMOS devices with schottky source and drain regions App 20080191285 - Ko; Chih-Hsin ; et al.	2008-08-14
Semiconductor device and a method of fabricating the device App 20080185659 - Ke; Chung-Hu ; et al.	2008-08-07
High performance semiconductor devices fabricated with strain-induced processes and methods for making same Grant 7,394,136 - Ke , et al. July 1, 2	2008-07-01
Isolation Spacer For Thin Soi Devices App 20080142888 - KO; Chih-Hsin ; et al.	2008-06-19
Isolation Spacer For Thin Soi Devices App 20080145982 - KO; Chih-Hsin ; et al.	2008-06-19
Dual metal silicides for lowering contact resistance App 20080145984 - Ke; Chung-Hu ; et al.	2008-06-19
Isolation spacer for thin SOI devices Grant 7,358,571 - Ko , et al. April 15, 2	2008-04-15
Diffusion topography engineering for high performance CMOS fabrication Grant 7,355,262 - Ko , et al. April 8, 2	2008-04-08
Transistors with stressed channels and methods of manufacture App 20070267694 - Ko; Chih-Hsin ; et al.	2007-11-22
Shallow trench isolation structure for semiconductor device App 20070235835 - Ko; Chih-Hsin ; et al.	2007-10-11
Diffusion topography engineering for high performance CMOS fabrication App 20070215936 - Ko; Chih-Hsin ; et al.	2007-09-20
Method of forming a shallow trench isolation structure Grant 7,238,564 - Ko , et al. July 3, 2	2007-07-03
Transistor mobility improvement by adjusting stress in shallow trench isolation App 20070132035 - Ko; Chih-Hsin ; et al.	2007-06-14
Transistor mobility improvement by adjusting stress in shallow trench isolation Grant 7,190,036 - Ko , et al. March 13, 2	2007-03-13
Hybrid Schottky source-drain CMOS for high mobility and low barrier App 20070052027 - Ke; Chung-Hu ; et al.	2007-03-08
Semiconductor structure having selective silicide-induced stress and a method of producing same App 20070045849 - Ke; Chung-Hu ; et al.	2007-03-01
High performance CMOS with metal-gate and Schottky source/drain Grant 7,176,537 - Lee , et al. February 13, 2	2007-02-13
High performance CMOS with metal-gate and Schottky source/drain App 20060273409 - Lee; Wen-Chin ; et al.	2006-12-07
Semiconductor structure having a strained region and a method of fabricating same App 20060208336 - Lee; Wen-Chin ; et al.	2006-09-21
Method of forming a shallow trench isolation structure App 20060205164 - Ko; Chih-Hsin ; et al.	2006-09-14
Thermal anneal process for strained-Si devices Grant 7,098,119 - Ke , et al. August 29, 2	2006-08-29
Capacitor-less 1T-DRAM cell with Schottky source and drain App 20060125121 - Ko; Chih-Hsin ; et al.	2006-06-15
Transistor mobility by adjusting stress in shallow trench isolation App 20060121688 - Ko; Chih-Hsin ; et al.	2006-06-08
Self-aligned gated p-i-n diode for ultra-fast switching App 20060091490 - Chen; Hung-Wei ; et al.	2006-05-04
Isolation spacer for thin SOI devices App 20060081928 - Ko; Chih-Hsin ; et al.	2006-04-20
High performance semiconductor devices fabricated with strain-induced processes and methods for making same App 20050263828 - Ke, Chung-Hu ; et al.	2005-12-01
Thermal anneal process for strained-Si devices App 20050253166 - Ke, Chung-Hu ; et al.	2005-11-17
Strained channel on insulator device App 20050233552 - Ke, Chung-Hu ; et al.	2005-10-20
Isolation structure with nitrogen-containing liner and methods of manufacture App 20050224907 - Ko, Chih-Hsin ; et al.	2005-10-13
High performance semiconductor devices fabricated with strain-induced processes and methods for making same Grant 6,949,443 - Ke , et al. September 27, 2	2005-09-27
Strained silicon structure App 20050194658 - Ke, Chung-Hu ; et al.	2005-09-08
Heterostructure resistor and method of forming the same App 20050127400 - Yeo, Yee-Chia ; et al.	2005-06-16
High performance semiconductor devices fabricated with strain-induced processes and methods for making same App 20050079677 - Ke, Chung-Hu ; et al.	2005-04-14

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