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name:-0.0079619884490967
name:-0.014287948608398
name:-0.0040290355682373
Kazda; Michael A. Patent Filings

Kazda; Michael A.

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kazda; Michael A..The latest application filed is for "dynamic microprocessor gate design tool for area/timing margin control".

Company Profile
2.5.6
  • Kazda; Michael A. - Poughkeepsie NY
  • Kazda; Michael A - Poughkeepsie NY
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
Dynamic microprocessor gate design tool for area/timing margin control
Grant 10,671,791 - Kazda , et al.
2020-06-02
Engineering change order aware global routing
Grant 10,606,976 - Kazda , et al.
2020-03-31
Dynamic Microprocessor Gate Design Tool For Area/timing Margin Control
App 20180330039 - Kazda; Michael A. ;   et al.
2018-11-15
Engineering Change Order Aware Global Routing
App 20180285507 - Kazda; Michael A. ;   et al.
2018-10-04
Dynamic microprocessor gate design tool for area/timing margin control
Grant 10,078,722 - Kazda , et al. September 18, 2
2018-09-18
Dynamic Microprocessor Gate Design Tool For Area/timing Margin Control
App 20170357747 - Kazda; Michael A. ;   et al.
2017-12-14
Method of improving timing critical cells for physical design in the presence of local placement congestion
Grant 9,075,948 - Kazda , et al. July 7, 2
2015-07-07
Method of Improving Timing Critical Cells For Physical Design In The Presence Of Local Placement Congestion
App 20150040095 - Kazda; Michael A. ;   et al.
2015-02-05
Post-routing Coupling Fixes For Integrated Circuits
App 20100257503 - Buehler; Markus ;   et al.
2010-10-07
System and method for sign-off timing closure of a VLSI chip
Grant 7,581,201 - Kazda , et al. August 25, 2
2009-08-25
System And Method For Sign-off Timing Closure Of A Vlsi Chip
App 20080209376 - Kazda; Michael A. ;   et al.
2008-08-28

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