Kazama; Yoshiharu
Patent Applications and Registrations
Patent applications and USPTO patent grants for Kazama; Yoshiharu.The latest application filed is for "method and apparatus for logical simulation".
- Kazama; Yoshiharu - Hadano JP
| Patent | Date |
|---|---|
| Method and apparatus for logical simulation Grant 5,051,941 - Takamine , et al. September 24, 1 | 1991-09-24 |
| Adjustment method and apparatus of a computer Grant 4,995,037 - Imada , et al. February 19, 1 | 1991-02-19 |
| Vector processor Grant 4,933,839 - Kinoshita , et al. June 12, 1 | 1990-06-12 |
| Logic circuit simulation method Grant 4,922,445 - Mizoue , et al. May 1, 1 | 1990-05-01 |
| Circuit simulation method with clock event suppression for debugging LSI circuits Grant 4,899,273 - Omoda , et al. February 6, 1 | 1990-02-06 |
| Display terminal equipment with concurrently operable plural input devices Grant 4,897,801 - Kazama , et al. January 30, 1 | 1990-01-30 |
| Vector operation designator Grant 4,773,006 - Kinoshita , et al. September 20, 1 | 1988-09-20 |
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