loadpatents
name:-0.029011011123657
name:-0.037523984909058
name:-0.010286092758179
Kaxiras; Stefanos Patent Filings

Kaxiras; Stefanos

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kaxiras; Stefanos.The latest application filed is for "securing computing systems against microarchitectural replay attacks".

Company Profile
9.30.24
  • Kaxiras; Stefanos - Uppsala SE
  • Kaxiras; Stefanos - Ioannina GR
  • Kaxiras; Stefanos - Patras GR
  • Kaxiras; Stefanos - Jersey City NJ
  • Kaxiras; Stefanos - Madison WI
*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.
Patent Activity
PatentDate
System and method for dynamic enforcement of store atomicity
Grant 11,334,485 - Kaxiras , et al. May 17, 2
2022-05-17
System and method for event monitoring in cache coherence protocols without explicit invalidations
Grant 11,237,966 - Kaxiras , et al. February 1, 2
2022-02-01
System and method for self-invalidation, self-downgrade cachecoherence protocols
Grant 11,188,464 - Ros , et al. November 30, 2
2021-11-30
Securing Computing Systems Against Microarchitectural Replay Attacks
App 20210365554 - SAKALIS; Christos ;   et al.
2021-11-25
Systems and methods for invisible speculative execution
Grant 11,163,576 - Sakalis , et al. November 2, 2
2021-11-02
Systems and methods for non-speculative store coalescing and generating atomic write sets using address subsets
Grant 11,119,920 - Ros , et al. September 14, 2
2021-09-14
System and method for non-speculative reordering of load accesses
Grant 11,106,468 - Ros , et al. August 31, 2
2021-08-31
Multi-core computer systems with private/shared cache line indicators
Grant 11,068,410 - Ros , et al. July 20, 2
2021-07-20
System protecting caches from side-channel attacks
Grant 10,915,466 - Hagersten , et al. February 9, 2
2021-02-09
Systems And Methods For Invisible Speculative Execution
App 20200301712 - SAKALIS; Christos ;   et al.
2020-09-24
System And Method For Dynamic Enforcement Of Store Atomicity
App 20200192801 - KAXIRAS; Stefanos ;   et al.
2020-06-18
Systems and methods for reducing first level cache energy by eliminating cache address tags
Grant 10,671,543 - Hagersten , et al.
2020-06-02
System And Method For Self-invalidation, Self-downgrade Cachecoherence Protocols
App 20200110703 - ROS; Alberto ;   et al.
2020-04-09
System and method for self-invalidation, self-downgrade cachecoherence protocols
Grant 10,528,471 - Ros , et al. J
2020-01-07
Systems And Methods For Non-speculative Store Coalescing And Generating Atomic Write Sets Using Address Subsets
App 20190324905 - ROS; Alberto ;   et al.
2019-10-24
System And Method For Event Monitoring In Cache Coherence Protocols Without Explicit Invalidations
App 20190324910 - KAXIRAS; Stefanos ;   et al.
2019-10-24
System Protecting Caches From Side-channel Attacks
App 20190272239 - HAGERSTEN; Erik Ernst ;   et al.
2019-09-05
Systems and methods for implementing a tag-less shared cache and a larger backing cache
Grant 10,402,331 - Hagersten , et al. Sep
2019-09-03
Systems and methods for direct data access in multi-level cache memory hierarchies
Grant 10,402,344 - Hagersten , et al. Sep
2019-09-03
System and method for event monitoring in cache coherence protocols without explicit invalidations
Grant 10,387,312 - Kaxiras , et al. A
2019-08-20
Multi-core Computer Systems With Private/shared Cache Line Indicators
App 20190205262 - ROS; Alberto ;   et al.
2019-07-04
Systems and methods for coherence in clustered cache hierarchies
Grant 10,324,861 - Ros , et al.
2019-06-18
System And Method For Non-speculative Reordering Of Load Accesses
App 20180373541 - ROS; Alberto ;   et al.
2018-12-27
System And Method For Self-invalidation, Self-downgrade Cachecoherence Protocols
App 20180181490 - ROS; Alberto ;   et al.
2018-06-28
System And Method For Event Monitoring In Cache Coherence Protocols Without Explicit Invalidations
App 20160321181 - KAXIRAS; Stefanos ;   et al.
2016-11-03
Systems And Methods For Coherence In Clustered Cache Hierarchies
App 20160232107 - ROS; Alberto ;   et al.
2016-08-11
System and method for simplifying cache coherence using multiple write policies
Grant 9,274,960 - Kaxiras , et al. March 1, 2
2016-03-01
Systems And Methods For Implementing A Tag-less Shared Cache And A Larger Backing Cache
App 20150347297 - HAGERSTEN; Erik ;   et al.
2015-12-03
Management Of Shared Pipeline Resource Usage Based On Level Information
App 20150347302 - HAGERSTEN; Erik ;   et al.
2015-12-03
Systems And Methods For Reducing First Level Cache Energy By Eliminating Cache Address Tags
App 20150143046 - HAGERSTEN; Erik ;   et al.
2015-05-21
Systems And Methods For Direct Data Access In Multi-level Cache Memory Hierarchies
App 20150143047 - HAGERSTEN; Erik ;   et al.
2015-05-21
System And Method For Simplifying Cache Coherence Using Multiple Write Policies
App 20130254488 - Kaxiras; Stefanos ;   et al.
2013-09-26
Set-associative memory architecture for routing tables
Grant 7,573,880 - Kaxiras , et al. August 11, 2
2009-08-11
Method and apparatus for reducing leakage power in a cache memory using adaptive time-based decay
Grant 7,472,302 - Hu , et al. December 30, 2
2008-12-30
Method and apparatus for splitting packets in multithreaded VLIW processor
Grant 7,096,343 - Berenbaum , et al. August 22, 2
2006-08-22
Method and apparatus for allocating functional units in a multithreaded VLIW processor
Grant 7,007,153 - Berenbaum , et al. February 28, 2
2006-02-28
Method and apparatus for reducing leakage power in a cache memory using adaptive time-based decay
App 20060041769 - Hu; Zhigang ;   et al.
2006-02-23
Method and apparatus for reducing leakage power in a cache memory by using a timer control signal that removes power to associated cache lines
Grant 6,983,388 - Kaxiras , et al. January 3, 2
2006-01-03
Set-associative memory architecture for routing tables
App 20050100012 - Kaxiras, Stefanos ;   et al.
2005-05-12
Directory-based prediction methods and apparatus for shared-memory multiprocessor systems
Grant 6,889,293 - Kaxiras , et al. May 3, 2
2005-05-03
Method and apparatus for releasing functional units in a multithreaded VLIW processor
Grant 6,665,791 - Berenbaum , et al. December 16, 2
2003-12-16
Method and apparatus for identifying splittable packets in a multithreaded VLIW processor
Grant 6,658,551 - Berenbaum , et al. December 2, 2
2003-12-02
Method and apparatus for reducing leakage power in a cache memory using adaptive time-based decay
App 20030145241 - Hu, Zhigang ;   et al.
2003-07-31
Method and apparatus for reducing leakage power in a cache memory
App 20020049918 - Kaxiras, Stefanos ;   et al.
2002-04-25
Multiple processor, distributed memory computer with out-of-order processing
Grant 6,161,170 - Burger , et al. December 12, 2
2000-12-12
Multiple processor, distributed memory computer with out-of-order processing
Grant 6,061,776 - Burger , et al. May 9, 2
2000-05-09
Distributed vector architecture
Grant 5,946,496 - Sugumar , et al. August 31, 1
1999-08-31
Multiple processor, distributed memory computer with out-of-order processing
Grant 5,943,501 - Burger , et al. August 24, 1
1999-08-24

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