Kawamura; Christopher

Patent Applications and Registrations

Patent applications and USPTO patent grants for Kawamura; Christopher.The latest application filed is for "apparatuses and method for reducing row address to column address delay".

Company Profile

9.18.18

Kawamura; Christopher - Boise ID

*profile and listings may contain filings by different individuals or companies with the same name. Review application materials to confirm ownership/assignment.

Patent Activity

Patent	Date
Apparatuses and method for reducing row address to column address delay Grant 11,176,978 - Kawamura November 16, 2	2021-11-16
Apparatuses and method for reducing row address to column address delay for a voltage threshold compensation sense amplifier Grant 11,120,847 - Kawamura , et al. September 14, 2	2021-09-14
Apparatuses And Method For Reducing Row Address To Column Address Delay App 20210027821 - Kawamura; Christopher	2021-01-28
Apparatuses and method for reducing row address to column address delay Grant 10,902,899 - Kawamura January 26, 2	2021-01-26
Apparatuses and method for reducing sense amplifier leakage current during active power-down Grant 10,839,871 - Kawamura November 17, 2	2020-11-17
Dynamic adjustment of memory cell digit line capacitance Grant 10,796,743 - Kawamura , et al. October 6, 2	2020-10-06
Apparatuses and method for reducing row address to column address delay Grant 10,790,000 - Kawamura September 29, 2	2020-09-29
Apparatuses And Method For Reducing Sense Amplifier Leakage Current During Active Power-down App 20200176034 - Kawamura; Christopher	2020-06-04
Sense amplifier signal boost Grant 10,672,435 - Ingalls , et al.	2020-06-02
Apparatuses And Method For Reducing Row Address To Column Address Delay For A Voltage Threshold Compensation Sense Amplifier App 20200160893 - Kawamura; Christopher ; et al.	2020-05-21
Apparatuses And Method For Reducing Row Address To Column Address Delay App 20200152249 - Kawamura; Christopher	2020-05-14
Periphery Fill And Localized Capacitance App 20200143863 - Kawamura; Christopher ; et al.	2020-05-07
Apparatuses And Method For Reducing Row Address To Column Address Delay App 20200135249 - Kawamura; Christopher	2020-04-30
Boosting a digit line voltage for a write operation Grant 10,636,472 - Kawamura , et al.	2020-04-28
Apparatuses and method for reducing sense amplifier leakage current during active power-down Grant 10,566,036 - Kawamura Feb	2020-02-18
Apparatuses and methods for reducing row address to column address delay for a voltage threshold compensation sense amplifier Grant 10,541,008 - Kawamura , et al. Ja	2020-01-21
Apparatuses and method for reducing row address to column address delay Grant 10,522,205 - Kawamura Dec	2019-12-31
Apparatuses And Method For Reducing Row Address To Column Address Delay App 20190392877 - Kawamura; Christopher	2019-12-26
Apparatuses And Methods For Reducing Row Address To Column Address Delay For A Voltage Threshold Compensation Sense Amplifier App 20190392872 - Kawamura; Christopher ; et al.	2019-12-26
Apparatuses And Method For Reducing Sense Amplifier Leakage Current During Active Power-down App 20190385649 - Kawamura; Christopher	2019-12-19
Boosting A Digit Line Voltage For A Write Operation App 20190371386 - Kawamura; Christopher ; et al.	2019-12-05
Boosting a digit line voltage for a write operation Grant 10,366,735 - Kawamura , et al. July 30, 2	2019-07-30
Sense Amplifier Signal Boost App 20190156869 - Ingalls; Charles ; et al.	2019-05-23
Dynamic Adjustment Of Memory Cell Digit Line Capacitance App 20190147932 - Kawamura; Christopher ; et al.	2019-05-16
Sense amplifier signal boost Grant 10,236,036 - Ingalls , et al.	2019-03-19
Dynamic adjustment of memory cell digit line capacitance Grant 10,153,024 - Kawamura , et al. Dec	2018-12-11
Boosting A Digit Line Voltage For A Write Operation App 20180350421 - Kawamura; Christopher ; et al.	2018-12-06
Sense Amplifier Signal Boost App 20180330766 - Ingalls; Charles ; et al.	2018-11-15
Boosting a digit line voltage for a write operation Grant 10,074,415 - Kawamura , et al. September 11, 2	2018-09-11
Dynamic Adjustment Of Memory Cell Digit Line Capacitance App 20180158501 - Kawamura; Christopher ; et al.	2018-06-07
Dynamic adjustment of memory cell digit line capacitance Grant 9,934,839 - Kawamura , et al. April 3, 2	2018-04-03
Dynamic Adjustment Of Memory Cell Digit Line Capacitance App 20180005680 - Kawamura; Christopher ; et al.	2018-01-04
Boosting A Digit Line Voltage For A Write Operation App 20170358340 - Kawamura; Christopher ; et al.	2017-12-14
Dynamic Adjustment Of Memory Cell Digit Line Capacitance App 20170294220 - Kawamura; Christopher ; et al.	2017-10-12
Dynamic adjustment of memory cell digit line capacitance Grant 9,786,348 - Kawamura , et al. October 10, 2	2017-10-10
Boosting a digit line voltage for a write operation Grant 9,721,638 - Kawamura , et al. August 1, 2	2017-08-01

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